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74ACT11139的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:专用逻辑 IC - 数字多路信号分离器和解码器
  • 功能描述:双路 2 线路至 4 线路解码器/多路解复用器
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74ACT11139的产品详情:

The 74ACT11139 is designed for use in high-performance memory-decoding or data-routing applications that require very short propagation delay times. In high-performance memory systems, this decoder is used to minimize the effects of system decoding.

The 74ACT11139 is composed of two individual 2-line to 4-line decoders in a single package. The active-low enables (1G\ or 2G\) can be used as data lines in demultiplexing applications. This decoder/demultiplexer features fully buffered inputs, each of which represents only one normalized load to its driving circuit.

The 74ACT11139 is characterized for operation from -40°C to 85°C.

 

 

74ACT11139的优势和特性:
  • Inputs Are TTL-Voltage Compatible
  • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
  • Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception
  • Fully Synchronous Operation for Counting
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (N)

EPIC is a trademark of Texas Instruments Incorporated.

74ACT11139的参数(英文):
  • Technology Family
  • ACT
  • Number of channels (#)
  • 2
  • Operating temperature range (C)
  • -40 to 85
  • Rating
  • Catalog
  • ICC (Max) (uA)
  • 80
74ACT11139具体的完整产品型号参数及价格(美元):

74ACT11139的完整型号有:74ACT11139D、74ACT11139PWR,以下是这些产品的关键参数及官网采购报价:

74ACT11139D,工作温度:-40 to 85,封装:SOIC (D)-16,包装数量MPQ:40个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网74ACT11139D的批量USD价格:.928(1000+)

74ACT11139PWR,工作温度:-40 to 85,封装:TSSOP (PW)-16,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网74ACT11139PWR的批量USD价格:.928(1000+)

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74ACT11139的评估套件:

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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