The 74ACT11623 is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (G\BA and GAB). The enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of G\BA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the 74ACT11623.

The 74ACT11623 is characterized for operation from - 40°C to 85°C.

• Local Bus-Latch Capability
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
• EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Small- Outline Packages and Standard Plastic 300-mil DIPs

  EPIC is a trademark of Texas Instruments Incorporated.

• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -24
• Technology Family
• ACT
• Rating
• Catalog
• Operating temperature range (C)
• -40 to 85

74ACT11623的完整型号有：74ACT11623DWR，以下是这些产品的关键参数及官网采购报价：

74ACT11623DWR，工作温度：-40 to 85，封装：SOIC (DW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网74ACT11623DWR的批量USD价格：1.305（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。