The ADC08D1000 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.3 GSPS. Consuming a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10^-18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate. The two converters can be interleaved and used as a single 2 GSPS ADC.

The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ T_A ≤ +85°C) temperature range.

Patenting Notice:

The Texas Instruments products covered by this datasheet are protected by at least the following U.S. patents: Pat. No. 6,847,320; Pat. No. 7,015,729; Pat. No. 7,068,195; and Pat. No. 7,088,281. This list of patents may not be all inclusive, and the products covered by this datasheet may be protected by additional issued patents and patents pending both in the U.S. and elsewhere in the world. A copy of this datasheet including the patent list noted here is also available on the Internet www.ti.com/lit/gpn/adc08d1000. This is intended to serve as notice under 35 U.S.C. § 287(a).

• Internal Sample-and-Hold
• Single +1.9V ±0.1V Operation
• Choice of SDR or DDR Output Clocking
• Interleave Mode for 2x Sampling Rate
• Multiple ADC Synchronization Capability
• Ensured No Missing Codes
• Serial Interface for Extended Control
• Fine Adjustment of Input Full-Scale Range and Offset
• Duty Cycle Corrected Sample Clock

• Sample rate (Max) (MSPS)
• 1000, 2000
• Resolution (Bits)
• 8
• Number of input channels
• 2, 1
• Interface type
• Parallel LVDS
• Analog input BW (MHz)
• 1700
• Features
• Ultra High Speed
• Rating
• Catalog
• Input range (Vp-p)
• 0.87
• Power consumption (Typ) (mW)
• 1600
• Architecture
• Folding Interpolating
• SNR (dB)
• 47.1
• ENOB (Bits)
• 7.4
• SFDR (dB)
• 55
• Operating temperature range (C)
• -40 to 85
• Input buffer
• No

ADC08D1000的完整型号有：ADC08D1000CIYB/NOPB，以下是这些产品的关键参数及官网采购报价：

ADC08D1000CIYB/NOPB，工作温度：-40 to 85，封装：HLQFP (NNB)-128，包装数量MPQ：60个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网ADC08D1000CIYB/NOPB的批量USD价格：256.52（1000+）

ADC08D1000 IBIS Model

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