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ADS61B23的基本参数
  • 制造厂商:TI
  • 产品类别:数据转换器
  • 技术类目:模数转换器 (ADC) - 高速模数转换器 (>10MSPS)
  • 功能描述:12 位、80MSPS 模数转换器 (ADC)
  • 点击这里打开及下载ADS61B23的技术文档资料
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ADS61B23的产品详情:

ADS61B23 is a 12-bit A/D converter (ADC) with a maximum sampling frequency of 80 MSPS. It combines high performance and low power consumption in a compact 32-QFN package. The analog inputs use buffers to isolate the switching transients of the internal sample & hold from the external driving circuit. The buffered inputs present very low input capacitance (< 2pF) & wide bandwidth. This makes it easy to drive them at high input frequencies, compared to an ADC without the input buffers.

ADS61B23 has coarse and fine gain options that are used to improve SFDR performance at lower full-scale analog input ranges.

The digital data outputs are parallel CMOS or DDR LVDS (Double Data Rate). Several features exist to ease data capture—controls for output clock position and output buffer drive strength, plus LVDS current and internal termination programmability.

The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some of these functions are configured using dedicated parallel pins so the device starts in the desired state after power-up.

ADS61B23 includes internal references, while eliminating the traditional reference pins and associated external decoupling. External reference mode is also supported.

ADS61B23的优势和特性:
  • Maximum Sample Rate: 80 MSPS
  • 12-bit Resolution with No Missing Codes
  • Buffered Analog Inputs with
    • Very Low Input Capacitance (< 2 pF)
    • High DC Resistance (5 k)
  • 82 dBc SFDR and 70 dBFS SNR(-1 BFS or 1.8 Vpp input)
  • 85 dBc SFDR (-6 dBFS or 1 Vpp input)
  • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR and SFDR Trade-Off
  • Parallel CMOS and Double Data Rate (DDR) LVDS Output Options
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Clock Amplitude Down to 400 mVPP
  • Clock Duty Cycle Stabilizer
  • Internal Reference with Support for External Reference
  • External Decoupling Eliminated for References
  • Programmable Output Clock Position and Drive Strength to Ease Data Capture
  • 3.3 V Analog and 1.8 V to 3.3 V Digital Supply
  • 32-pin QFN Package (5 mm × 5 mm)
  • Pin Compatible 12-Bit Family (ADS612X)
  • Temperature range -40°C to 85°C
  • APPLICATIONS
    • Wireless Communications Infrastructure
    • Software Defined Radio
    • Power Amplifier Linearization
    • 802.16d/e
    • Test and Measurement Instrumentation
    • High Definition Video
    • Medical Imaging
    • Radar Systems

ADS61B23的参数(英文):
  • Sample rate (Max) (MSPS)
  • 80
  • Resolution (Bits)
  • 12
  • Number of input channels
  • 1
  • Interface type
  • DDR LVDS, Parallel CMOS
  • Analog input BW (MHz)
  • 450
  • Features
  • Low Power
  • Rating
  • Catalog
  • Input range (Vp-p)
  • 2
  • Power consumption (Typ) (mW)
  • 351
  • Architecture
  • Pipeline
  • SNR (dB)
  • 70.2
  • ENOB (Bits)
  • 11.3
  • SFDR (dB)
  • 87
  • Operating temperature range (C)
  • -40 to 85
  • Input buffer
  • Yes
ADS61B23具体的完整产品型号参数及价格(美元):

ADS61B23的完整型号有:ADS61B23IRHBR、ADS61B23IRHBT,以下是这些产品的关键参数及官网采购报价:

ADS61B23IRHBR,工作温度:-40 to 85,封装:VQFN (RHB)-32,包装数量MPQ:3000个,MSL 等级/回流焊峰值温度:Level-3-260C-168 HR,引脚镀层/焊球材料:NIPDAU,TI官网ADS61B23IRHBR的批量USD价格:24.343(1000+)

ADS61B23IRHBT,工作温度:-40 to 85,封装:VQFN (RHB)-32,包装数量MPQ:250个,MSL 等级/回流焊峰值温度:Level-3-260C-168 HR,引脚镀层/焊球材料:NIPDAU,TI官网ADS61B23IRHBT的批量USD价格:26.343(1000+)

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ADS61B23的评估套件:

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