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CD14538B的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:专用逻辑 IC - 单稳多谐振荡器(单稳态)
  • 功能描述:CMOS 双路精密单稳多谐振荡器(125 摄氏度工作温度)
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CD14538B的产品详情:

CD14538B dual precision monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Precision control of output pulse widths is achieved through linear CMOS techniques.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538B is not used, its inputs must be tied to either VDD or VSS. See Table 1.

In normal operation the circuit retriggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time period (T) for this multivibrator can be calculated by: T = RXCX.

The minimum value of external resistance, RX, is 4 K. The minimum and maximum values of external capacitance, CX are 0 pF and 100µF, respectively.

The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new designs.

The CD14538B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD14538B的优势和特性:
  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Replaces CD4538B Type
  • Wide range of output-pulse widths
  • Schmitt-trigger input allows unlimited rise and fall times on +TR and -TR inputs
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Pulse delay and timing
    • Pulse shaping

*T = 0.5 RXCX for CX 1000 pF #T = RXCX; CXmin = 5000 pF Data sheet acquired from Harris Semiconductor

CD14538B的参数(英文):
  • Number of channels (#)
  • 2
  • Supply voltage (Min) (V)
  • 3
  • Supply voltage (Max) (V)
  • 18
  • Technology Family
  • CD4000
  • Input type
  • Standard CMOS
  • Output type
  • Push-Pull
  • ICC (uA)
  • 3000
  • IOL (Max) (mA)
  • 4
  • IOH (Max) (mA)
  • -4
  • Features
  • Balanced outputs, Standard speed (tpd > 50ns), Positive input clamp diode, Retriggerable
CD14538B具体的完整产品型号参数及价格(美元):

CD14538B的完整型号有:CD14538BE、CD14538BM、CD14538BM96、CD14538BMT、CD14538BNSR、CD14538BPW、CD14538BPWR,以下是这些产品的关键参数及官网采购报价:

CD14538BE,工作温度:-55 to 125,封装:PDIP (N)-16,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BE的批量USD价格:.117(1000+)

CD14538BM,工作温度:-55 to 125,封装:SOIC (D)-16,包装数量MPQ:40个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BM的批量USD价格:.302(1000+)

CD14538BM96,工作温度:-55 to 125,封装:SOIC (D)-16,包装数量MPQ:2500个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BM96的批量USD价格:.116(1000+)

CD14538BMT,工作温度:-55 to 125,封装:SOIC (D)-16,包装数量MPQ:250个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BMT的批量USD价格:.302(1000+)

CD14538BNSR,工作温度:-55 to 125,封装:SO (NS)-16,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BNSR的批量USD价格:.112(1000+)

CD14538BPW,工作温度:-55 to 125,封装:TSSOP (PW)-16,包装数量MPQ:90个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BPW的批量USD价格:.302(1000+)

CD14538BPWR,工作温度:-55 to 125,封装:TSSOP (PW)-16,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD14538BPWR的批量USD价格:.143(1000+)

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CD14538B的评估套件:

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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