The ’ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications (See Application Information).

• Inputs Are TTL-Voltage Compatible
• Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
• Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems
• Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
• Balanced Propagation Delays
• ±24-mA Output Drive Current
  • Fanout to 15 F Devices
• SCR-Latchup-Resistant CMOS Process and Circuit Design
• Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

• Technology Family
• ACT
• Number of channels (#)
• 1
• Operating temperature range (C)
• -55 to 125
• Rating
• Military
• ICC (Max) (uA)
• 160

CD54ACT138的完整型号有：CD54ACT138F3A，以下是这些产品的关键参数及官网采购报价：

CD54ACT138F3A，工作温度：-55 to 125，封装：CDIP (J)-16，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网CD54ACT138F3A的批量USD价格：8.15（1000+）

CD54ACT138F3A，工作温度：-55 to 125，封装：CDIP (J)-16，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网CD54ACT138F3A的批量USD价格：8.15（1000+）