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CD54HC161的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:触发器、锁存器和寄存器 - 计数器
  • 功能描述:具有异步复位的高速 CMOS 逻辑 4 位二进制计数器
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CD54HC161的产品详情:

The ’HC161, ’HCT161, ’HC163, and ’HCT163 are presettable synchronous counters that feature look-ahead carry logic for use in high-speed counting applications. The ’HC161 and ’HCT161 are asynchronous reset decade and binary counters, respectively; the ’HC163 and ’HCT163 devices are decade and binary counters, respectively, that are reset synchronously with the clock. Counting and parallel presetting are both accomplished synchronously with the negative-to-positive transition of the clock.

A low level on the synchronous parallel enable input, SPE, disables counting operation and allows data at the P0 to P3 inputs to be loaded into the counter (provided that the setup and hold requirements for SPE are met).

All counters are reset with a low level on the Master Reset input, MR. In the ’HC163 and ’HCT163 counters (synchronous reset types), the requirements for setup and hold time with respect to the clock must be met.

Two count enables, PE and TE, in each counter are provided for n-bit cascading. In all counters reset action occurs regardless of the level of the SPE\, PE and TE inputs (and the clock input, CP, in the ’HC161 and ’HCT161 types).

If a decade counter is preset to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one count as shown in state diagram.

The look-ahead carry feature simplifies serial cascading of the counters. Both count enable inputs (PE and TE) must be high to count. The TE input is gated with the Q outputs of all four stages so that at the maximum count the terminal count (TC) output goes high for one clock period. This TC pulse is used to enable the next cascaded stage.

CD54HC161的优势和特性:
  • ’HC161, ’HCT161 4-Bit Binary Counter, Asynchronous Reset
  • ’HC163, ’HCT163 4-Bit Binary Counter, Synchronous Reset
  • Synchronous Counting and Loading
  • Two Count Enable Inputs for n-Bit Cascading
  • Look-Ahead Carry for High-Speed Counting
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1μA at VOL, VOH

The CD54HCT161 is obsolete and no longer is supplied. Data sheet acquired from Harris Semiconductor.

CD54HC161的参数(英文):
  • Function
  • Counter
  • Bits (#)
  • 4
  • Technology Family
  • HC
  • Supply voltage (Min) (V)
  • 2
  • Supply voltage (Max) (V)
  • 6
  • Input type
  • Standard CMOS
  • Output type
  • Push-Pull
  • Features
  • Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
CD54HC161具体的完整产品型号参数及价格(美元):

CD54HC161的完整型号有:CD54HC161F、CD54HC161F3A,以下是这些产品的关键参数及官网采购报价:

CD54HC161F,工作温度:-55 to 125,封装:CDIP (J)-16,包装数量MPQ:1个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:SNPB,TI官网CD54HC161F的批量USD价格:7.464(1000+)

CD54HC161F3A,工作温度:-55 to 125,封装:CDIP (J)-16,包装数量MPQ:1个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:SNPB,TI官网CD54HC161F3A的批量USD价格:7.986(1000+)

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CD54HC161的评估套件:

CD54HC161F,工作温度:-55 to 125,封装:CDIP (J)-16,包装数量MPQ:1个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:SNPB,TI官网CD54HC161F的批量USD价格:7.464(1000+)

CD54HC161F3A,工作温度:-55 to 125,封装:CDIP (J)-16,包装数量MPQ:1个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:SNPB,TI官网CD54HC161F3A的批量USD价格:7.986(1000+)

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