The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low.

Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.

• Qualified for Automotive Applications
• Select One of Eight Data Outputs Active Low
• I/O Port or Memory Selector
• Three Enable Inputs to Simplify Cascading
• Typical Propagation Delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C
• Fanout (Over Temperature Range)
  • Standard Outputs . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . 15 LSTTL Loads
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• 2-V to 6-V VCC Operation
• High Noise Immunity; NIL or NIH = 30% of VCC, VCC = 5 V

• Technology Family
• HC
• Number of channels (#)
• 1
• Operating temperature range (C)
• -40 to 125
• Rating
• Automotive
• ICC (Max) (uA)
• 160

CD74HC138-Q1的完整型号有：CD74HC138QM96Q1，以下是这些产品的关键参数及官网采购报价：

CD74HC138QM96Q1，工作温度：-40 to 125，封装：SOIC (D)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CD74HC138QM96Q1的批量USD价格：0.241（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。