- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：触发器、锁存器和寄存器 - 移位寄存器
- 功能描述：高速 CMOS 逻辑双路 4 级静态移位寄存器
- 点击这里打开及下载CD74HC4015的技术文档资料
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The ’HC4015 consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent Clock (CP) and Reset (MR) inputs as well as a single serial Data input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each positive- going clock transition. Resetting of all stages is accomplished by a high level on the reset line.
The device can drive up to 10 low power Schottky equivalent loads. The ’HC4015 is an enhanced version of equivalent CMOS types.
- Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25°C
- Positive-Edge Clocking
- Overriding Reset
- Buffered Inputs and Outputs
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- Configuration
- Serial-in, Parallel-out
- Bits (#)
- 4
- Technology Family
- HC
- Supply voltage (Min) (V)
- 2
- Supply voltage (Max) (V)
- 6
- Input type
- Standard CMOS
- Output type
- Push-Pull
- Clock Frequency (MHz)
- 60
- IOL (Max) (mA)
- 5.2
- IOH (Max) (mA)
- -5.2
- ICC (Max) (uA)
- 160
- Features
- Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
CD74HC4015的完整型号有：CD74HC4015E、CD74HC4015M，以下是这些产品的关键参数及官网采购报价：
CD74HC4015E，工作温度：-55 to 125，封装：PDIP (N)-16，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网CD74HC4015E的批量USD价格：.581（1000+）
CD74HC4015M，工作温度：-55 to 125，封装：SOIC (D)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CD74HC4015M的批量USD价格：.512（1000+）
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
