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CD74HCT75的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:触发器、锁存器和寄存器 - D 型锁存器
  • 功能描述:高速 CMOS 逻辑双路 2 位双稳态透明锁存器
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CD74HCT75的产品详情:

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

CD74HCT75的优势和特性:
  • True and Complementary Outputs
  • Buffered Inputs and Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1μA at VOL, VOH

Data sheet acquired from Harris Semiconductor

CD74HCT75的参数(英文):
  • Number of channels (#)
  • 16
  • Technology Family
  • HCT
  • Supply voltage (Min) (V)
  • 4.5
  • Supply voltage (Max) (V)
  • 5.5
  • Input type
  • TTL-Compatible CMOS
  • Output type
  • CMOS
  • Clock Frequency (Max) (MHz)
  • 25
  • IOL (Max) (mA)
  • 4
  • IOH (Max) (mA)
  • -4
  • ICC (Max) (uA)
  • 80
  • Features
  • Standard speed (tpd > 50ns), Very high speed (tpd 5-10ns), Partial power down (Ioff)
CD74HCT75具体的完整产品型号参数及价格(美元):

CD74HCT75的完整型号有:CD74HCT75E、CD74HCT75M,以下是这些产品的关键参数及官网采购报价:

CD74HCT75E,工作温度:-55 to 125,封装:PDIP (N)-16,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:NIPDAU,TI官网CD74HCT75E的批量USD价格:.35(1000+)

CD74HCT75M,工作温度:-55 to 125,封装:SOIC (D)-16,包装数量MPQ:40个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD74HCT75M的批量USD价格:.308(1000+)

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CD74HCT75的评估套件:

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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