The CDCE949 and CDCEL949 are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. They generate up to 9 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to four independent configurable PLLs.

The CDCEx949 has separate output supply pins, V_DDOUT, 1.8 V for the CDCEL949, and 2.5 V to 3.3 V for CDCE949.

The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable, allowing synchronization of the output frequency to an external control signal, that is, a PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio or video, networking (WLAN, BlueTooth™, Ethernet, GPS) or Interface (USB, IEEE1394, Memory Stick) clocks from a reference input frequency, such as 27 MHz.

All PLLs support SSC (Spread-Spectrum Clocking). SSC can be Center-Spread or Down-Spread clocking. This is a common technique to reduce electro-magnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop-filter components are automatically adjusted to achieve high stability, and to optimize the jitter-transfer characteristics of each PLL.

The device supports non-volatile EEPROM programming for easy customization of the device to the application. It is preset to a factory-default configuration. It can be reprogrammed to a different application configuration before PCB assembly, or reprogrammed by in-system programming. All device settings are programmable through the SDA and SCL bus, a 2-wire serial interface.

Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operation including frequency selection, changing the SSC parameters to lower EMI, PLL bypass, power down, and choosing between low level or 3-state for the output-disable function.

The CDCEx949 operates in a 1.8-V environment. It operates within a temperature range of –40°C to 85°C.

• Member of Programmable Clock Generator Family
  • CDCEx913: 1 PLLs, 3 Outputs
  • CDCEx925: 2 PLLs, 5 Outputs
  • CDCEx937: 3 PLLs, 7 Outputs
  • CDCEx949: 4 PLLs, 9 Outputs
• In-System Programmability and EEPROM
  • Serial Programmable Volatile Register
  • Nonvolatile EEPROM to Store Customer Settings
• Flexible Input Clocking Concept
  • External Crystal: 8 to 32 MHz
  • On-Chip VCXO: Pull-Range ±150 ppm
  • Single-Ended LVCMOS Up to 160MHz
• Free Selectable Output Frequency Up to 230MHz
• Low-Noise PLL Core
  • PLL Loop Filter Components Integrated
  • Low Period Jitter (Typical 60 ps)
• Separate Output Supply Pins
  • CDCE949: 3.3 V and 2.5 V
  • CDCEL949: 1.8 V
• Flexible Clock Driver
  • Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable or Power Down
  • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth?, WLAN, Ethernet?, and GPS
  • Generates Common Clock Frequencies Used With TI-DaVinci?, OMAP?, DSPs
  • Programmable SSC Modulation
  • Enables 0-PPM Clock Generation
• 1.8-V Device Core Supply
• Wide Temperature Range: –40°C to 85°C
• Packaged in TSSOP
• Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock?)

• Function
• Clock synthesizer
• Number of outputs
• 9
• Output frequency (Max) (MHz)
• 230
• Core supply voltage (V)
• 1.8
• Output supply voltage (V)
• 1.8
• Input type
• XTAL
• Output type
• LVCMOS
• Operating temperature range (C)
• -40 to 85
• Features
• Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC)
• Rating
• Catalog

CDCEL949的完整型号有：CDCEL949PW、CDCEL949PWR，以下是这些产品的关键参数及官网采购报价：

CDCEL949PW，工作温度：-40 to 85，封装：TSSOP (PW)-24，包装数量MPQ：60个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CDCEL949PW的批量USD价格：2.482（1000+）

CDCEL949PWR，工作温度：-40 to 85，封装：TSSOP (PW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CDCEL949PWR的批量USD价格：2.068（1000+）

CDCEL949PERF-EVM — CDCEL949 性能评估模块

有了晶体选项和 1.8V LVCMOS 输入，CDCEL949PERF-EVM 将有助于验证 CDCEL949 的功能和性能。输出可以通过 SMA 电缆直接连接到示波器。附带下列信息/项目：EVM 用户指南：SCAU022；程序设计软件时钟专业版：scac073d；CDCEL949 数据表：SCAS844；CDCE949 IBIS 模型：SCAC094。

CDCEL9XXPROGEVM — CDCE(L)949 系列 EEPROM 编程板

CDCE(L)949 系列时钟发生器集成了 EEPROM，允许在启动后保存默认频率设置。CDCEL9XXPROGEVM 是允许对原型样片或小批量生产进行快速编程的编程板。它适用于该系列的全部 8 款器件：CDCE949、CDCE937、CDCE925、CDCE913、CDCEL949、CDCEL937、CDCEL925 和 CDCEL913，并且带有易于使用的通用插座。

此外还提供另一个用于性能测试和评估的 EVM，其器件型号为 CDCE(L)9xxPERF-EVM，此性能评估模块适用于每个单独器件。

Drivers for the CDCEL9xx programmer EVM

TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:

• CDCE949
• CDCE937
• CDCE925
• CDCE913
• CDCE906
• CDCE706
• CDCEL949
• CDCEL937
• CDCEL925
• CDCEL913

It is intended to be used with the evaluation modules of the above devices.

ClockPro Software (Rev. E)

PSpice for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助?PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。

在?PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)

CLOCK-TREE-ARCHITECT — 时钟树架构编程软件

时钟树架构是一款时钟树综合工具，可根据您的系统要求生成时钟树解决方案，从而帮助您简化设计流程。该工具从庞大的时钟产品数据库中提取数据，然后生成系统级多芯片时钟解决方案。