TI代理,常备极具竞争力的充足现货
TI哪些型号被关注? TI热门产品型号
CDCVF2509A的基本参数
  • 制造厂商:TI
  • 产品类别:时钟和计时
  • 技术类目:时钟缓冲器
  • 功能描述:具有断电模式的 3.3V 锁相环路时钟驱动器
  • 点击这里打开及下载CDCVF2509A的技术文档资料
  • TI代理渠道,提供当日发货、严格的质量标准,满足您的目标价格
快速报价,在行业拥有较高的知名度及影响力
CDCVF2509A的产品详情:

The CDCVF2509A is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDCVF2509A operates at a 3.3-V VCC. It also provides integrated series-damping resistors that make it ideal for driving point-to-point loads.

One bank of five outputs and one bank of four outputs provide nine low-skew, low-jitter copies of CLK. Output signal duty cycles are adjusted to 50%, independent of the duty cycle at CLK. Each bank of outputs is enabled or disabled separately via the control (1G and 2G) inputs. When the G inputs are high, the outputs switch in phase and frequency with CLK; when the G inputs are low, the outputs are disabled to the logic-low state. The device automatically goes into power-down mode when no input signal (< 1 MHz) is applied to CLK; the outputs go into a low state.

Unlike many products containing PLLs, the CDCVF2509A does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost.

For application information, see application reports High Speed Distribution Design Techniques for CDC509/516/2509/2510/2516 (SLMA003) and Using CDC2509A/2510A PLL with Spread Spectrum Clocking (SSC) (SCAA039).

The CDCVF2509A is characterized for operation from 0°C to 85°C.

Because it is based on PLL circuitry, the CDCVF2509A requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization time is required following power up and application of a fixed-frequency, fixed-phase signal at CLK, and following any changes to the PLL reference or feedback signals. The PLL can be bypassed by strapping AVCC to ground to use as a simple clock buffer.

CDCVF2509A的优势和特性:
  • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1
  • Spread Spectrum Clock Compatible
  • Operating Frequency 20 MHz to 175 MHz
  • Static Phase Error Distribution at 66 MHz to 166 MHz Is ±125 ps
  • Jitter (cyc - cyc) at 60 MHz to 175 MHz Is Typ = 65 ps
  • Advanced Deep Submicron Process Results in More Than 40% Lower Power Consumption Versus Current Generation PC133 Devices
  • Auto Frequency Detection to Disable Device (Power-Down Mode)
  • Available in Plastic 24-Pin TSSOP
  • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
  • Distributes One Clock Input to One Bank of Five and One Bank of Four Outputs
  • Separate Output Enable for Each Output Bank
  • External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
  • 25- On-Chip Series Damping Resistors
  • No External RC Network Required
  • Operates at 3.3 V
  • APPLICATIONS
    • DRAM Applications
    • PLL Based Clock Distributors
    • Non-PLL Clock Buffer

CDCVF2509A的参数(英文):
  • Function
  • Memory interface
  • Additive RMS jitter (Typ) (fs)
  • 65
  • Output frequency (Max) (MHz)
  • 175
  • Number of outputs
  • 9
  • Output supply voltage (V)
  • 3.3
  • Core supply voltage (V)
  • 3.3
  • Output skew (ps)
  • 100
  • Features
  • SDR
  • Operating temperature range (C)
  • 0 to 85
  • Rating
  • Catalog
  • Output type
  • LVTTL
  • Input type
  • LVTTL
CDCVF2509A具体的完整产品型号参数及价格(美元):

CDCVF2509A的完整型号有:CDCVF2509APW、CDCVF2509APWR,以下是这些产品的关键参数及官网采购报价:

CDCVF2509APW,工作温度:0 to 85,封装:TSSOP (PW)-24,包装数量MPQ:60个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CDCVF2509APW的批量USD价格:6.26(1000+)

CDCVF2509APWR,工作温度:0 to 85,封装:TSSOP (PW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CDCVF2509APWR的批量USD价格:5.297(1000+)

轻松满足您的TI芯片采购需求
CDCVF2509A的评估套件:

CDCVF2509A IBIS Model (Rev. A)

PSpice for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助?PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在?PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
TI代理|TI中国代理 - 国内领先的TI芯片采购平台
丰富的可销售TI代理库存,专业的销售团队可随时响应您的紧急需求,目标成为有价值的TI代理