- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：触发器、锁存器和寄存器 - 计数器
- 功能描述：可预置同步 4 位二进制加/减计数器
- 点击这里打开及下载CY74FCT191T的技术文档资料
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The CY74FCT191T is a reversible modulo-16 binary counter, featuring synchronous counting and asynchronous presetting. The preset allows the CY74FCT191T to be used in programmable dividers. The count enable input, terminal count output, and ripple-clock output make possible a variety of methods of implementing multiusage counters. In the counting modes, state changes are initiated by the rising edge of the clock.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Function, Pinout, and Drive Compatible With FCT and F Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Matched Rise and Fall Times
- 64-mA Output Sink Current 32-mA Output Source Current
- Function
- Binary Counter
- Bits (#)
- 4
- Technology Family
- FCT
- Supply voltage (Min) (V)
- 4.75
- Supply voltage (Max) (V)
- 5.25
- Input type
- TTL-Compatible CMOS
- Output type
- Push-Pull
- Features
- Ultra high speed (tpd <5ns), Partial power down (Ioff), Presettable
CY74FCT191T的完整型号有：CY74FCT191ATSOC、CY74FCT191CTQCT、CY74FCT191CTSOC，以下是这些产品的关键参数及官网采购报价：
CY74FCT191ATSOC，工作温度：-40 to 85，封装：SOIC (DW)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CY74FCT191ATSOC的批量USD价格：.469（1000+）
CY74FCT191CTQCT，工作温度：-40 to 85，封装：SSOP (DBQ)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网CY74FCT191CTQCT的批量USD价格：.61（1000+）
CY74FCT191CTSOC，工作温度：-40 to 85，封装：SOIC (DW)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网CY74FCT191CTSOC的批量USD价格：.469（1000+）
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
