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DS90C365A的基本参数
  • 制造厂商:TI
  • 产品类别:接口
  • 技术类目:其他接口
  • 功能描述:+3.3V 可编程 LVDS 发送器 18 位平板显示器链路 - 87.5MHz
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DS90C365A的产品详情:

The DS90C365A is a pin to pin compatible replacement for DS90C363, DS90C363A and DS90C365. The DS90C365A has additional features and improvements making it an ideal replacement for DS90C363, DS90C363A and DS90C365. family of LVDS Transmitters.

The DS90C365A transmitter converts 21 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over the fourth LVDS link. Every cycle of the transmit clock 21 bits RGB of input data are sampled and transmitted. At a transmit clock frequency of 87.5 MHz, 21 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 612.5 Mbps per LVDS data channel. Using a 87.5 MHz clock, the data throughput is 229.687 Mbytes/sec. This transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe FPDLink Receiver without any translation logic.

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces with added Spead Spectrum Clocking support..

DS90C365A的优势和特性:
  • Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365
  • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered.
  • Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% center spread or -5% down spread.
  • “Input Clock Detection” feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high.
  • 18 to 87.5 MHz shift clock support
  • Tx power consumption < 146 mW (typ) at 87.5 MHz Grayscale
  • Tx Power-down mode < 37 uW (typ)
  • Supports VGA, SVGA, XGA, SXGA (dual pixel), SXGA+ (dual pixel), UXGA (dual pixel).
  • Narrow bus reduces cable size and cost
  • Up to 1.785 Gbps throughput
  • Up to 223.125 Megabytes/sec bandwidth
  • 345 mV (typ) swing LVDS devices for low EMI
  • PLL requires no external components
  • Compliant to TIA/EIA-644 LVDS standard
  • Low profile 48-lead TSSOP package

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments. TRI-STATE is a trademark of Texas Instruments.

DS90C365A的参数(英文):
  • Operating temperature range (C)
  • -10 to 70
DS90C365A具体的完整产品型号参数及价格(美元):

DS90C365A的完整型号有:DS90C365AMT/NOPB、DS90C365AMTX/NOPB,以下是这些产品的关键参数及官网采购报价:

DS90C365AMT/NOPB,工作温度:-10 to 70,封装:TSSOP (DGG)-48,包装数量MPQ:38个,MSL 等级/回流焊峰值温度:Level-2-260C-1 YEAR,引脚镀层/焊球材料:SN,TI官网DS90C365AMT/NOPB的批量USD价格:2.756(1000+)

DS90C365AMTX/NOPB,工作温度:-10 to 70,封装:TSSOP (DGG)-48,包装数量MPQ:1000个,MSL 等级/回流焊峰值温度:Level-2-260C-1 YEAR,引脚镀层/焊球材料:SN,TI官网DS90C365AMTX/NOPB的批量USD价格:2.297(1000+)

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DS90C365A的评估套件:

FLINK3V8BT-85 — 用于 FPD 链接系列串行器和解串器 LVDS 器件的评估套件

FPD-Link evaluation kit contains a Transmitter (Tx) board, a Receiver (Rx) board along with interfacing cables. This kit will demonstrate the chipsets interfacing from test equipment or a graphics controller using Low Voltage Differential Signaling (LVDS) to a receiver board.

The Transmitter board (...)

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