The DS90URxxx-Q1 chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is ideally suited for driving graphical data to displays requiring 18-bit color depth: RGB666 + HS, VS, DE + three additional general-purpose data channels. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. The device saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The DS90URxxx-Q1 incorporates FPD-Link II LVDS signaling on the high-speed I/O. FPD-Link II LVDS provides a low-power and low-noise environment for reliably transferring data over a serial transmission path. By optimizing the Serializer output edge rate for the operating frequency range, EMI is further reduced.

In addition, the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC-balanced encoding and decoding is used to support AC-coupled interconnects. Using TI’s proprietary random lock, the parallel data of the Serializer are randomized to the Deserializer without the need of REFCLK.

• Supports Displays With 18-Bit Color Depth
• 5-MHz to 43-MHz Pixel Clock
• Automotive-Grade Product AEC-Q100 Grade 2 Qualified
• 24:1 Interface Compression
• Embedded Clock With DC Balancing Supports AC-Coupled Data Transmission
• Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable
• No Reference Clock Required (Deserializer)
• Meets ISO 10605 ESD – Greater than 8 kV HBM ESD Structure
• Hot Plug Support
• EMI Reduction – Serializer Accepts Spread Spectrum Input; Data Randomization and Shuffling on Serial Link; Deserializer Provides Adjustable PTO (Progressive Turnon) LVCMOS Outputs
• @Speed BIST (Built-In Self-Test) to Validate LVDS Transmission Path
• Individual Power-Down Controls for Both Transmitter and Receiver
• Power Supply Range 3.3 V ±10%
• 48-Pin TQFP Package for Transmitter and 64-Pin TQFP Package for Receiver
• Temperature Range: –40°C to 105°C
• Backward-Compatible Mode With DS90C241/DS90C124

• Function
• Serializer
• Color depth (bpp)
• 18
• Input compatibility
• LVCMOS
• Pixel clock frequency (Max) (MHz)
• 43
• Output compatibility
• FPD-Link LVDS
• Features
• Low-EMI Point-to-Point Communication
• EMI reduction
• LVDS
• Diagnostics
• BIST
• Operating temperature range (C)
• -40 to 105

DS90UR241-Q1的完整型号有：DS90UR241QVS/NOPB、DS90UR241QVSX/NOPB，以下是这些产品的关键参数及官网采购报价：

DS90UR241QVS/NOPB，工作温度：-40 to 105，封装：TQFP (PFB)-48，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网DS90UR241QVS/NOPB的批量USD价格：5.817（1000+）

DS90UR241QVSX/NOPB，工作温度：-40 to 105，封装：TQFP (PFB)-48，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网DS90UR241QVSX/NOPB的批量USD价格：4.974（1000+）

SERDESUR-43USB — 用于 DS90UR241 DS90UR124 串行器和解串器芯片组的评估板

The SERDESUR-43 is an evaluation kit designed to demonstrate performance and capabilities of the DS90UR124 and DS90UR241 FPD-Link II Serializer/Deserializer Chipset.

The DS90UR241 Serializer board accepts LVCMOS input signals and provides single serialized FPD-LInk II LVDS data pair as an output. (...)

DS90UR241 IBIS Model

PSpice for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助?PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。

在?PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)

TINA-TI — 基于 SPICE 的模拟仿真程序

TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能，允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

TINA-TI 安装需要大约 500MB。直接安装，如果想卸载也很容易。我们相信您肯定会爱不释手。

TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需获取可用 TINA-TI 模型的完整列表，请参阅：SpiceRack - 完整列表

需要 HSpice (...)

High Efficiency Portable Media Player (PMP) Dock Station CAD Files

TIDA-00137 参考设计是一种高速串行视频接口，通过此接口，可将采用 DVP (LVCMOS) 接口的远程汽车 WVGA TFT LCD 显示屏连接到视频处理系统。此设计使用 TI 的 FPD-Link II SerDes 技术，通过屏蔽双绞线传输未压缩的视频数据。应用示例包括后座娱乐系统、汽车仪表组和主机显示器。此设计通过整合 DS90UR241-Q1 和 DS90UR124-Q1 板来形成该解决方案。