The LMH1983 is a highly-integrated programmable audio/video (A/V) clock generator intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used in applications supporting SMPTE serial digital video (SDI) and digital audio AES3/EBU standards. It offers low-jitter reference clocks for any SDI transmitter to meet stringent output jitter specifications without additional clock cleaning circuits.

The LMH1983 features automatic input format detection, simple programming of multiple A/V output formats, genlock or digital free-run modes, and override programmability of various automatic functions. The recognized input formats include HVF syncs for the major video standards, 27 MHz, 10 MHz, and 32/44.1/48/96 kHz audio word clocks.

The dual-stage PLL architecture integrates four PLLs with three on-chip VCOs. The first stage (PLL1) uses an external low-noise 27 MHz VCXO with narrow loop bandwidth to provide a clean reference clock for the next stage. The second stage (PLL2, 3, 4) consists of three parallel VCO PLLs for simultaneous generation of the major digital A/V clock fundamental rates, including 148.5 MHz, 148.5/1.001 MHz, and 98.304 MHz (4 × 24.576 MHz). Each PLL can generate a clock and a timing pulse to indicate top of frame (TOF).

When locked to reference, an internal 10-bit ADC will track the loop filter control voltage. When a loss of reference (LOR) occurs, the LMH1983 can be programmed to hold the control voltage to maintain output accuracy within ±0.5 ppm (typical) of the previous reference. The LMH1983 can be configured to re-synchronize to a previous reference with glitch-less operation.

• Four PLLs for Simultaneous A/V Clock Generation
  • PLL1: 27 or 13.5 MHz
  • PLL2: 148.5 or 74.25 MHz
  • PLL3: 148.5/1.001 or 74.25/1.001 MHz
  • PLL4: 98.304 MHz / 2X (X = 0 to 15)
• 3 x 2 Video Clock Crosspoint
• Flexible PLL Bandwidth to Optimize Jitter Performance and Lock Time
• Soft Resynchronization to New Reference
• Digital Holdover or Free-run on Loss of Reference
• Status Flags for Loss of Reference and Loss of PLL Lock
• 3.3 V Single Supply Operation
• I2C Interface with Address Select Pin (3 States)

• Function
• Clock generator
• Number of outputs
• 4
• Output frequency (Max) (MHz)
• 148.5
• Core supply voltage (V)
• 3.3
• Output supply voltage (V)
• 3.3
• Input type
• LVCMOS
• Output type
• LVDS
• Operating temperature range (C)
• -40 to 85
• Features
• 3G/HD/SD video clock generator with audio clock
• Rating
• Catalog

LMH1983的完整型号有：LMH1983SQ/NOPB、LMH1983SQE/NOPB、LMH1983SQX/NOPB，以下是这些产品的关键参数及官网采购报价：

LMH1983SQ/NOPB，工作温度：-40 to 85，封装：WQFN (RTA)-40，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网LMH1983SQ/NOPB的批量USD价格：18.119（1000+）

LMH1983SQE/NOPB，工作温度：-40 to 85，封装：WQFN (RTA)-40，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网LMH1983SQE/NOPB的批量USD价格：18.119（1000+）

LMH1983SQX/NOPB，工作温度：-40 to 85，封装：WQFN (RTA)-40，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：SN，TI官网LMH1983SQX/NOPB的批量USD价格：16.119（1000+）

SD1983EVK — SDSD1983EVK 评估套件

The LMH1983 Evaluation Kit (SD1983EVK) allows for the evaluation of the LMH1983 3G/HD/SD Video Clock Generator with Audio Clock. The LMH1983 device is configured and controlled using National Semiconductor?s Analog Launch Pad (ALP) software graphical user interface (GUI).

The LMH1983 is supported on (...)

LMH1983 IBIS Model

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