- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：触发器、锁存器和寄存器 - D 型触发器
- 功能描述：具有三态输出的八路边沿触发式 D 型触发器
- 点击这里打开及下载SN54LVTH374的技术文档资料
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These octal flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The eight flip-flops of the ’LVTH374 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Support Unregulated Battery Operation Down to 2.7 V
- Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- Number of channels (#)
- 8
- Technology Family
- LVT
- Supply voltage (Min) (V)
- 2.7
- Supply voltage (Max) (V)
- 3.6
- Input type
- TTL-Compatible CMOS
- Output type
- 3-State
- Clock Frequency (Max) (MHz)
- 150
- IOL (Max) (mA)
- 64
- IOH (Max) (mA)
- -32
- ICC (Max) (uA)
- 5000
- Features
- Ultra high speed (tpd <5ns), Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Bus-hold
SN54LVTH374的完整型号有：5962-9951001QSA、SNJ54LVTH374W，以下是这些产品的关键参数及官网采购报价：
5962-9951001QSA，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网5962-9951001QSA的批量USD价格：25.406（1000+）
SNJ54LVTH374W，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网SNJ54LVTH374W的批量USD价格：25.406（1000+）
5962-9951001QSA，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网5962-9951001QSA的批量USD价格：25.406（1000+）
SNJ54LVTH374W，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网SNJ54LVTH374W的批量USD价格：25.406（1000+）
