- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:缓冲器、驱动器和收发器 - 同相缓冲器和驱动器
- 功能描述:具有 TTL 兼容型 CMOS 输入和三态输出的 8 通道、4.5V 至 5.5V 缓冲器
- 点击这里打开及下载SN64BCT25244的技术文档资料
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The SN64BCT25244 is a 25- octal buffer and line driver designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers.
When the output-enable (1 and 2) inputs are low, the device transmits data from the A inputs to the Y outputs. When 1 and 2 are high, the outputs are in the high-impedance state.
This buffer/driver is capable of sinking 188-mA IOL, which facilitates switching 25- transmission lines on the incident wave. The distributed VCC and GND pins minimize switching noise for more reliable system operation.
The outputs are in a high-impedance state during power up and power down while the supply voltage value is less than approximately 3 V.
The SN64BCT25244 is characterized for operation from -40°C to 85°C and 0°C to 70°C.
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- High-Impedance State During Power Up and Power Down
- ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Designed to Facilitate Incident-Wave Switching for Line Impedances of 25 or Greater
- Distributed VCC and GND Pins Minimize Noise Generated by the Simultaneous Switching of Outputs
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)
- Technology Family
- BCT
- Supply voltage (Min) (V)
- 4.5
- Supply voltage (Max) (V)
- 5.5
- Number of channels (#)
- 8
- IOL (Max) (mA)
- 188
- ICC (Max) (uA)
- 119000
- IOH (Max) (mA)
- -80
- Input type
- TTL-Compatible CMOS
- Output type
- 3-State
- Features
- Very high speed (tpd 5-10ns), Power up 3-state
- Rating
- Catalog
SN64BCT25244的完整型号有:SN64BCT25244DW,以下是这些产品的关键参数及官网采购报价:
SN64BCT25244DW,工作温度:-40 to 85,封装:SOIC (DW)-24,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN64BCT25244DW的批量USD价格:2.562(1000+)
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。