These d-c triggered multivibrators feature output pulse-duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The '122 and 'LS122 have internal timing resistors that allow the circuits to be used with only an external capacitor, if so desired. Once triggered, the basic pulse duration may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use of the overriding clear. Figure 1 illustrates pulse control by retriggering and early clear.

The 'LS122 and 'LS123 are provided enough Schmitt hysteresis to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 millivolt per nanosecond.

The R_int is nominally 10 k for '122 and 'LS122.

• D-C Triggered from Active-High or Active-Low Gated Logic Inputs
• Retriggerable for Very Long Output Pulses, Up to 100% Duty Cycle
• Overriding Clear Terminates Output Pulse
• '122 and 'LS122 Have Internal Timing Resistors

• Number of channels (#)
• 2
• Supply voltage (Min) (V)
• 4.75
• Supply voltage (Max) (V)
• 5.25
• Technology Family
• TTL
• Input type
• Schmitt-Trigger
• Output type
• Push-Pull
• ICC (uA)
• 80000
• IOL (Max) (mA)
• 16
• IOH (Max) (mA)
• -0.8
• Features
• Standard speed (tpd > 50ns)

SN74123的完整型号有：SN74123N，以下是这些产品的关键参数及官网采购报价：

SN74123N，工作温度：0 to 70，封装：PDIP (N)-16，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74123N的批量USD价格：2.071（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。