- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:缓冲器、驱动器和收发器 - 通用收发器
- 功能描述:具有三态输出的八路总线收发器和寄存器
- 点击这里打开及下载SN74ABT646A的技术文档资料
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These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ABT646A devices.
Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function still is enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
- Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- IOL (Max) (mA)
- 64
- IOH (Max) (mA)
- -32
- Technology Family
- ABT
- Rating
- Catalog
- Operating temperature range (C)
- -40 to 85
SN74ABT646A的完整型号有:SN74ABT646ADBR、SN74ABT646ADW、SN74ABT646ADWR、SN74ABT646ANSR、SN74ABT646APW,以下是这些产品的关键参数及官网采购报价:
SN74ABT646ADBR,工作温度:-40 to 85,封装:SSOP (DB)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABT646ADBR的批量USD价格:.66(1000+)
SN74ABT646ADW,工作温度:-40 to 85,封装:SOIC (DW)-24,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABT646ADW的批量USD价格:.72(1000+)
SN74ABT646ADWR,工作温度:-40 to 85,封装:SOIC (DW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABT646ADWR的批量USD价格:.6(1000+)
SN74ABT646ANSR,工作温度:-40 to 85,封装:SO (NS)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABT646ANSR的批量USD价格:.72(1000+)
SN74ABT646APW,工作温度:-40 to 85,封装:TSSOP (PW)-24,包装数量MPQ:60个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABT646APW的批量USD价格:.6(1000+)
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。