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- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:缓冲器、驱动器和收发器 - 通用收发器
- 功能描述:具有三态输出的 36 位寄存总线收发器
- 点击这里打开及下载SN74ABTH32543的技术文档资料
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The 'ABTH32543 are 36-bit registered transceivers that contain two sets of D-type latches for temporary storage of data flowing in either direction. These devices can be used as two 18-bit transceivers or one 36-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB\) input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ABTH32543 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABTH32543 is characterized for operation from -40°C to 85°C
- Members of the Texas Instruments Widebus+TM Family
- State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C
- High-Impedance State During Power Up and Power Down
- Released as DSCC SMD 5962-9557801NXD
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include 100-Pin Plastic Thin Quad Flat (PZ) Package With 14 × 14-mm Body Using 0.5-mm Lead Pitch and Space-Saving 100-Pin Ceramic Quad Flat (HS) Package
Widebus+ and EPIC-IIB are trademarks of Texas Instruments Incorporated.
The HS package is not production released.
- IOL (Max) (mA)
- 64
- IOH (Max) (mA)
- -32
- Technology Family
- ABT
- Rating
- Catalog
- Operating temperature range (C)
- -40 to 85
SN74ABTH32543的完整型号有:SN74ABTH32543PZ,以下是这些产品的关键参数及官网采购报价:
SN74ABTH32543PZ,工作温度:-40 to 85,封装:LQFP (PZ)-100,包装数量MPQ:90个,MSL 等级/回流焊峰值温度:Level-3-260C-168 HR,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABTH32543PZ的批量USD价格:11.415(1000+)
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SN74ABTH32543PZ,工作温度:-40 to 85,封装:LQFP (PZ)-100,包装数量MPQ:90个,MSL 等级/回流焊峰值温度:Level-3-260C-168 HR,引脚镀层/焊球材料:NIPDAU,TI官网SN74ABTH32543PZ的批量USD价格:11.415(1000+)
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