This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.

The SN74ACT1071 is characterized for operation from -40°C to 85°C.

• Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
• Reduces Undershoot and Overshoot Caused By Line Reflections
• Repetitive Peak Forward Current . . . IFRM = 100 mA
• Inputs Are TTL-Voltage Compatible
• Low Power Consumption (Like CMOS)
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise

• Bits (#)
• 10
• Supply voltage (Min) (V)
• 4.5
• Supply voltage (Max) (V)
• 5.5

SN74ACT1071的完整型号有：SN74ACT1071D、SN74ACT1071DR，以下是这些产品的关键参数及官网采购报价：

SN74ACT1071D，工作温度：-40 to 85，封装：SOIC (D)-14，包装数量MPQ：50个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ACT1071D的批量USD价格：1.429（1000+）

SN74ACT1071DR，工作温度：-40 to 85，封装：SOIC (D)-14，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ACT1071DR的批量USD价格：1.191（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。