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- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:专用逻辑 IC - 总线终端阵列
- 功能描述:具有总线保持功能的 16 位总线终端网络
- 点击这里打开及下载SN74ACT1073的技术文档资料
- TI代理渠道,提供当日发货、严格的质量标准,满足您的目标价格
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This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or pulldown resistors.
The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.
- Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
- 4.5-V to 5.5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Reduces Undershoot and Overshoot Caused By Line Reflections
- Repetitive Peak Forward Current ...IFRM = 100 mA
- Inputs Are TTL-Voltage Compatible
- Low Power Consumption (Like CMOS)
- Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- Bits (#)
- 16
- Supply voltage (Min) (V)
- 4.5
- Supply voltage (Max) (V)
- 5.5
SN74ACT1073的完整型号有:SN74ACT1073DW、SN74ACT1073DWR、SN74ACT1073NSR,以下是这些产品的关键参数及官网采购报价:
SN74ACT1073DW,工作温度:-40 to 85,封装:SOIC (DW)-20,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ACT1073DW的批量USD价格:1.429(1000+)
SN74ACT1073DWR,工作温度:-40 to 85,封装:SOIC (DW)-20,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ACT1073DWR的批量USD价格:1.191(1000+)
SN74ACT1073NSR,工作温度:-40 to 85,封装:SO (NS)-20,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74ACT1073NSR的批量USD价格:1.31(1000+)
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14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
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