These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A\ input is low, and the B input goes high. In the second method, the B input is high, and the A\ input goes low. In the third method, the A\ input is low, the B input is high, and the clear (CLR)\ input goes high.

The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between C_ext and R_ext/C_ext (positive) and an external resistor connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistance between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR\ low.

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A\, B, and CLR\ inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs.

Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A\) or high-level-active (B) input. Pulse duration can be reduced by taking CLR\ low. CLR\ input can be used to override A\ or B inputs. The input/output timing diagram illustrates pulse control by retriggering the inputs and early clearing.

The variance in output pulse duration from device to device typically is less than ±0.5% for given external timing components. An example of this distribution for the ’AHCT123A is shown in Figure 10. Variations in output pulse duration versus supply voltage and temperature are shown in Figure 6.

During power up, Q outputs are in the low state, and Q\ outputs are in the high state. The outputs are glitch free, without applying a reset pulse.

For additional application information on multivibrators, see the application report, Designing With the SN74AHC123A and SN74AHCT123A, literature number SCLA014.

• Inputs Are TTL-Voltage Compatible
• Schmitt-Trigger Circuitry On A\, B, and CLR\ Inputs for Slow Input Transition Rates
• Edge Triggered From Active-High or Active-Low Gated Logic Inputs
• Retriggerable for Very Long Output Pulses
• Overriding Clear Terminates Output Pulse
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

• Number of channels (#)
• 2
• Supply voltage (Min) (V)
• 2
• Supply voltage (Max) (V)
• 5.5
• Technology Family
• AHCT
• Input type
• TTL-Compatible CMOS
• Output type
• Push-Pull
• ICC (uA)
• 40
• IOL (Max) (mA)
• 8
• IOH (Max) (mA)
• -8
• Features
• Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Retriggerable

SN74AHCT123A的完整型号有：SN74AHCT123AD、SN74AHCT123ADBR、SN74AHCT123ADGVR、SN74AHCT123ADR、SN74AHCT123AN、SN74AHCT123APWR，以下是这些产品的关键参数及官网采购报价：

SN74AHCT123AD，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123AD的批量USD价格：.365（1000+）

SN74AHCT123ADBR，工作温度：-40 to 85，封装：SSOP (DB)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123ADBR的批量USD价格：.182（1000+）

SN74AHCT123ADGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123ADGVR的批量USD价格：.165（1000+）

SN74AHCT123ADR，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123ADR的批量USD价格：.165（1000+）

SN74AHCT123AN，工作温度：-40 to 85，封装：PDIP (N)-16，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123AN的批量USD价格：.215（1000+）

SN74AHCT123APWR，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AHCT123APWR的批量USD价格：.165（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。