- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：触发器、锁存器和寄存器 - D 型锁存器
- 功能描述：具有三态输出的八路 D 类透明锁存器
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These 8-bit D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs follow the complements of data (D) inputs. When LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs.
A buffered output-enable (OE)\ input places the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased high logic level provide the capability to drive bus lines without interface or pullup components.
OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- Number of channels (#)
- 8
- Technology Family
- ALS
- Supply voltage (Min) (V)
- 4.5
- Supply voltage (Max) (V)
- 5.5
- Input type
- Bipolar
- Output type
- 3-State
- Clock Frequency (Max) (MHz)
- 75
- IOL (Max) (mA)
- 24
- IOH (Max) (mA)
- -2.6
- ICC (Max) (uA)
- 29000
- Features
- High speed (tpd 10-50ns), Inverting output, Flow-through pinout
SN74ALS563B的完整型号有：SN74ALS563BDW、SN74ALS563BN、SN74ALS563BNSR，以下是这些产品的关键参数及官网采购报价：
SN74ALS563BDW，工作温度：0 to 70，封装：SOIC (DW)-20，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALS563BDW的批量USD价格：3.099（1000+）
SN74ALS563BN，工作温度：0 to 70，封装：PDIP (N)-20，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALS563BN的批量USD价格：3.564（1000+）
SN74ALS563BNSR，工作温度：0 to 70，封装：SO (NS)-20，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALS563BNSR的批量USD价格：3.099（1000+）
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
