These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.

A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.

• 3-State Buffer-Type Outputs Drive Bus Lines Directly
• Bus-Structured Pinout
• Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
• Buffered Control Inputs to Reduce dc Loading Effects
• Power-Up High-Impedance State
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

• Number of channels (#)
• 10
• Technology Family
• ALS
• Supply voltage (Min) (V)
• 4.5
• Supply voltage (Max) (V)
• 5.5
• Input type
• Bipolar
• Output type
• 3-State
• Clock Frequency (Max) (MHz)
• 75
• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -2.6
• ICC (Max) (uA)
• 62000
• Features
• High speed (tpd 10-50ns), Flow-through pinout

SN74ALS841的完整型号有：SN74ALS841DW，以下是这些产品的关键参数及官网采购报价：

SN74ALS841DW，工作温度：0 to 70，封装：SOIC (DW)-24，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALS841DW的批量USD价格：3.468（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。