- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：缓冲器、驱动器和收发器 - 通用收发器
- 功能描述：具有三态输出的 12 位至 24 位寄存总线交换器
- 点击这里打开及下载SN74ALVCH16270的技术文档资料
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This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus.
The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate CLKEN\ inputs are low. The select (SEL)\ line selects 1B or 2B data for the A outputs. For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage register in the A-to-2B path. Proper control of the CLKENA\ inputs allows two sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables (OEA\, OEB\). The control terminals are registered to synchronize the bus-direction changes with CLK.
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible, and OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE\ being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16270 is characterized for operation from –40°C to 85°C.
- Member of the Texas Instruments Widebus? Family
- EPIC? (Enhanced-Performance Implanted CMOS) Submicron Process
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
Widebus, EPIC are trademarks of Texas Instruments.
- IOL (Max) (mA)
- 24
- IOH (Max) (mA)
- -32
- Technology Family
- ALVC
- Rating
- Catalog
- Operating temperature range (C)
- -40 to 85
SN74ALVCH16270的完整型号有：SN74ALVCH16270DL、SN74ALVCH16270DLR，以下是这些产品的关键参数及官网采购报价：
SN74ALVCH16270DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16270DL的批量USD价格：.958（1000+）
SN74ALVCH16270DLR，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16270DLR的批量USD价格：.798（1000+）
SN74ALVCH16270DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16270DL的批量USD价格：.958（1000+）
SN74ALVCH16270DLR，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16270DLR的批量USD价格：.798（1000+）
