- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：触发器、锁存器和寄存器 - D 型锁存器
- 功能描述：具有三态输出的 9 位总线接口 D 类锁存器
- 点击这里打开及下载SN74ALVCH162841的技术文档资料
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This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH162841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.
The SN74ALVCH162841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (1OE\ or 2OE\) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
OE\ does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to sink up to 12 mA, include equivalent 26- 
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
The SN74ALVCH162841 is characterized for operation from -40°C to 85°C.
- Member of the Texas Instruments Widebus? Family
- EPIC? (Enhanced-Performance Implanted CMOS) Submicron Process
- Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
NOTE: For tape and reel order entry: The DGGR package is abbreviated to GR. Widebus, EPIC are trademarks of Texas Instruments.
- Number of channels (#)
- 20
- Technology Family
- ALVC
- Supply voltage (Min) (V)
- 1.65
- Supply voltage (Max) (V)
- 3.6
- Input type
- Standard CMOS
- Output type
- 3-State
- Clock Frequency (Max) (MHz)
- 150
- IOL (Max) (mA)
- 12
- IOH (Max) (mA)
- -12
- ICC (Max) (uA)
- 40
- Features
- Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Damping resistors, Bus-hold, Flow-through pinout
SN74ALVCH162841的完整型号有：SN74ALVCH162841DL、SN74ALVCH162841GR，以下是这些产品的关键参数及官网采购报价：
SN74ALVCH162841DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH162841DL的批量USD价格：.804（1000+）
SN74ALVCH162841GR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH162841GR的批量USD价格：.804（1000+）
SN74ALVCH162841DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH162841DL的批量USD价格：.804（1000+）
SN74ALVCH162841GR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH162841GR的批量USD价格：.804（1000+）
