SN74ALVCH16823_TI 具有三态输出的 18 位总线接口触发器

制造厂商：TI
产品类别：逻辑和电压转换
技术类目：触发器、锁存器和寄存器 - D 型触发器
功能描述：具有三态输出的 18 位总线接口触发器
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SN74ALVCH16823的产品详情：

This 18-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH16823 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The SN74ALVCH16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock.

A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output-enable (OE) input does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16823 is characterized for operation from -40°C to 85°C.

SN74ALVCH16823的优势和特性：

Member of the Texas Instruments Widebus? Family
EPIC? (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.

SN74ALVCH16823的参数（英文）：

Number of channels (#)
18
Technology Family
ALVC
Supply voltage (Min) (V)
1.65
Supply voltage (Max) (V)
3.6
Input type
Standard CMOS
Output type
3-State
Clock Frequency (Max) (MHz)
150
IOL (Max) (mA)
24
IOH (Max) (mA)
-24
ICC (Max) (uA)
40
Features
Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Bus-hold

SN74ALVCH16823具体的完整产品型号参数及价格（美元）：

SN74ALVCH16823的完整型号有：SN74ALVCH16823DGGR、SN74ALVCH16823DGVR、SN74ALVCH16823DL、SN74ALVCH16823DLR，以下是这些产品的关键参数及官网采购报价：

SN74ALVCH16823DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16823DGGR的批量USD价格：1.141（1000+）

SN74ALVCH16823DGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16823DGVR的批量USD价格：1.141（1000+）

SN74ALVCH16823DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16823DL的批量USD价格：1.483（1000+）

SN74ALVCH16823DLR，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16823DLR的批量USD价格：1.255（1000+）

SN74ALVCH16823的评估套件：

SN74ALVCH16823的电路图解：

SN74ALVCH16823的评估套件：