This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Available in the Texas Instruments NanoFree? Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• Ioff Supports Partial-Power-Down Mode Operation
• Sub-1-V Operable
• Max tpd of 1.5 ns at 1.8 V
• Low Power Consumption, 10-μA Max ICC
• ±8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments

• Number of channels (#)
• 1
• Technology Family
• AUC
• Supply voltage (Min) (V)
• 0.8
• Supply voltage (Max) (V)
• 2.7
• Input type
• Standard CMOS
• Output type
• Push-Pull
• Clock Frequency (Max) (MHz)
• 275
• IOL (Max) (mA)
• 9
• IOH (Max) (mA)
• -9
• ICC (Max) (uA)
• 10
• Features
• Balanced outputs, Ultra high speed (tpd <5ns), Over-voltage tolerant inputs, Partial power down (Ioff)

SN74AUC1G74的完整型号有：SN74AUC1G74DCTR、SN74AUC1G74DCUR、SN74AUC1G74DCURG4、SN74AUC1G74RSER、SN74AUC1G74YZPR，以下是这些产品的关键参数及官网采购报价：

SN74AUC1G74DCTR，工作温度：-40 to 85，封装：SM8 (DCT)-8，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUC1G74DCTR的批量USD价格：.192（1000+）

SN74AUC1G74DCUR，工作温度：-40 to 85，封装：VSSOP (DCU)-8，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：SN，TI官网SN74AUC1G74DCUR的批量USD价格：.132（1000+）

SN74AUC1G74DCURG4，工作温度：-40 to 85，封装：VSSOP (DCU)-8，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUC1G74DCURG4的批量USD价格：.152（1000+）

SN74AUC1G74RSER，工作温度：-40 to 85，封装：UQFN (RSE)-8，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUC1G74RSER的批量USD价格：.172（1000+）

SN74AUC1G74YZPR，工作温度：-40 to 85，封装：DSBGA (YZP)-8，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：SNAGCU，TI官网SN74AUC1G74YZPR的批量USD价格：.192（1000+）

5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑 EVM

灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。