AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T57 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V V_CC supply.

The wide V_CC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.

Schmitt-trigger inputs (V_T = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

The SN74AUP1T57 can be easily configured to perform a required gate function by connecting A, B, and C inputs to V_CC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.

I_off is a feature that allows for powered-down conditions (V_CC = 0 V) and is important in portable and mobile applications. When V_CC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.

The SN74AUP1T57 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.

• Available in the Texas Instruments NanoStar? Packages
• Single-Supply Voltage Translator
• 1.8 V to 3.3 V (at VCC = 3.3 V)
• 2.5 V to 3.3 V (at VCC = 3.3 V)
• 1.8 V to 2.5 V (at VCC = 2.5 V)
• 3.3 V to 2.5 V (at VCC = 2.5 V)
• Nine Configurable Gate Logic Functions
• Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
• Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 μA)
• Very Low Static and Dynamic Power Consumption
• Pb-Free Packages Available: SON (DRY or DSF), SOT-23 (DBV), SC-70 (DCK), and NanoStar WCSP
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22
  • 2000-V Human-Body Model (A114-B, Class II)
  • 1000-V Charged-Device Model (C101)
• Related Devices: SN74AUP1T58, SN74AUP1T97, and SN74AUP1T98

NanoStar is a trademark of Texas Instruments.

• Technology Family
• AUP1T
• Bits (#)
• 1
• High input voltage (Min) (Vih)
• 1.35
• High input voltage (Max) (Vih)
• 3.6
• Vout (Min) (V)
• 2.3
• Vout (Max) (V)
• 3.6
• IOH (Max) (mA)
• -4
• IOL (Max) (mA)
• 4

SN74AUP1T57的完整型号有：SN74AUP1T57DBVR、SN74AUP1T57DBVT、SN74AUP1T57DCKR、SN74AUP1T57DRYR、SN74AUP1T57DSFR、SN74AUP1T57YFPR、SN74AUP1T57YZPR，以下是这些产品的关键参数及官网采购报价：

SN74AUP1T57DBVR，工作温度：-40 to 85，封装：SOT-23 (DBV)-6，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUP1T57DBVR的批量USD价格：.158（1000+）

SN74AUP1T57DBVT，工作温度：-40 to 85，封装：SOT-23 (DBV)-6，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUP1T57DBVT的批量USD价格：.358（1000+）

SN74AUP1T57DCKR，工作温度：-40 to 85，封装：SC70 (DCK)-6，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AUP1T57DCKR的批量USD价格：.158（1000+）

SN74AUP1T57DRYR，工作温度：-40 to 85，封装：SON (DRY)-6，包装数量MPQ：5000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAUAG，TI官网SN74AUP1T57DRYR的批量USD价格：.174（1000+）

SN74AUP1T57DSFR，工作温度：-40 to 85，封装：SON (DSF)-6，包装数量MPQ：5000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAUAG，TI官网SN74AUP1T57DSFR的批量USD价格：.19（1000+）

SN74AUP1T57YFPR，工作温度：-40 to 85，封装：DSBGA (YFP)-6，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：SNAGCU，TI官网SN74AUP1T57YFPR的批量USD价格：.182（1000+）

SN74AUP1T57YZPR，工作温度：-40 to 85，封装：DSBGA (YZP)-6，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：SNAGCU，TI官网SN74AUP1T57YZPR的批量USD价格：.177（1000+）

5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑 EVM

灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。