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SN74AUP2G125的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:缓冲器、驱动器和收发器 - 同相缓冲器和驱动器
  • 功能描述:具有三态输出的 2 通道、0.8V 至 3.6V 低功耗缓冲器
  • 点击这里打开及下载SN74AUP2G125的技术文档资料
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SN74AUP2G125的产品详情:

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The SN74AUP2G125 is a dual bus buffer gate designed for 0.8-V to 3.6-V VCC operation. This device features dual line drivers with 3-state outputs. Each output is disabled when the corresponding output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUP2G125的优势和特性:
  • Available in the Texas Instruments NanoStar? Package
  • Low Static-Power Consumption (ICC = 0.9 μA Max)
  • Low Dynamic-Power Consumption (Cpd = 4 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typ)
  • Low Noise – Overshoot and Undershoot <10% of VCC
  • Input-Disable Feature Allows Floating Input Conditions
  • Ioff Supports Partial-Power-Down Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.4 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar is a trademark of Texas Instruments

SN74AUP2G125的参数(英文):
  • Technology Family
  • AUP
  • Supply voltage (Min) (V)
  • 0.8
  • Supply voltage (Max) (V)
  • 3.6
  • Number of channels (#)
  • 2
  • IOL (Max) (mA)
  • 4
  • ICC (Max) (uA)
  • 0.9
  • IOH (Max) (mA)
  • -4
  • Input type
  • Standard CMOS
  • Output type
  • 3-State
  • Features
  • Balanced outputs, Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs
  • Rating
  • Catalog
SN74AUP2G125具体的完整产品型号参数及价格(美元):

SN74AUP2G125的完整型号有:SN74AUP2G125DCUR、SN74AUP2G125DQER、SN74AUP2G125RSER、SN74AUP2G125YFPR、SN74AUP2G125YZPR,以下是这些产品的关键参数及官网采购报价:

SN74AUP2G125DCUR,工作温度:-40 to 85,封装:VSSOP (DCU)-8,包装数量MPQ:3000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74AUP2G125DCUR的批量USD价格:.189(1000+)

SN74AUP2G125DQER,工作温度:-40 to 85,封装:X2SON (DQE)-8,包装数量MPQ:5000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAUAG,TI官网SN74AUP2G125DQER的批量USD价格:.198(1000+)

SN74AUP2G125RSER,工作温度:-40 to 85,封装:UQFN (RSE)-8,包装数量MPQ:5000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAUAG,TI官网SN74AUP2G125RSER的批量USD价格:.246(1000+)

SN74AUP2G125YFPR,工作温度:-40 to 85,封装:DSBGA (YFP)-8,包装数量MPQ:3000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:SNAGCU,TI官网SN74AUP2G125YFPR的批量USD价格:.239(1000+)

SN74AUP2G125YZPR,工作温度:-40 to 85,封装:DSBGA (YZP)-8,包装数量MPQ:3000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:SNAGCU,TI官网SN74AUP2G125YZPR的批量USD价格:.249(1000+)

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SN74AUP2G125的评估套件:

5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑 EVM

灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。
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