- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：缓冲器、驱动器和收发器 - 同相缓冲器和驱动器
- 功能描述：具有三态输出的 20 通道、1.2V 至 3.6V 缓冲器
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A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOCTM) Circuitry Technology and Applications, literature number SCEA009.
This 20-bit noninverting buffer/driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation.
The SN74AVC16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The SN74AVC16827 is characterized for operation from -40°C to 85°C.
- Member of the Texas Instruments WidebusTM Family
- EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
- DOCTM (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
- Less Than 2-ns Maximum Propagation Delay at 2.5-V and 3.3-V VCC
- Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC
- Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) Packages
DOC, EPIC, and Widebus are trademarks of Texas Instruments.
- Technology Family
- AVC
- Supply voltage (Min) (V)
- 1.2
- Supply voltage (Max) (V)
- 3.6
- Number of channels (#)
- 20
- IOL (Max) (mA)
- 12
- ICC (Max) (uA)
- 40
- IOH (Max) (mA)
- -12
- Input type
- Standard CMOS
- Output type
- 3-State
- Features
- Balanced outputs, Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs
- Rating
- Catalog
SN74AVC16827的完整型号有：SN74AVC16827DGGR、SN74AVC16827DGVR，以下是这些产品的关键参数及官网采购报价：
SN74AVC16827DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AVC16827DGGR的批量USD价格：1.708（1000+）
SN74AVC16827DGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AVC16827DGVR的批量USD价格：1.708（1000+）
SN74AVC16827DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AVC16827DGGR的批量USD价格：1.708（1000+）
SN74AVC16827DGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AVC16827DGVR的批量USD价格：1.708（1000+）
