The SN74BCT29854 is an 8-bit to 9-bit parity transceiver designed for asynchronous communication between data buses. When data is transmitted from the A to B bus, a parity bit is generated. When data is transmitted from the B to A bus with its corresponding parity bit, the parity-error () output will indicate whether or not an error in the B data has occurred. The output-enable (, ) inputs can be used to disable the device so that the buses are effectively isolated.

A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector parity-error () flag. can be either passed, sampled, stored, or cleared from the latch using the latch-enable () and clear () control inputs. When both and are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition which gives the designer more system diagnostic capability. The SN74BCT29854 provides inverting logic.

The SN74BCT29854 is characterized for operation from 0°C to 70°C.

• BiCMOS Process With TTL Inputs and Outputs
• State-of-the-Art BiCMOS Design Significantly Reduces Standby Current
• Flow-Through Pinout (All Inputs on Opposite Side From Outputs)
• Functionally Equivalent to AMD Am29854
• High-Speed Bus Transceiver With Parity Generator/Checker
• Parity-Error Flag With Open-Collector Output
• Latch for Storage of the Parity-Error Flag
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)

• IOL (Max) (mA)
• 48
• IOH (Max) (mA)
• -24
• Technology Family
• BCT
• Rating
• Catalog
• Operating temperature range (C)
• 0 to 70

SN74BCT29854的完整型号有：SN74BCT29854DW，以下是这些产品的关键参数及官网采购报价：

SN74BCT29854DW，工作温度：0 to 70，封装：SOIC (DW)-24，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74BCT29854DW的批量USD价格：2.283（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。