These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

• State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
• Bus Transceivers/Registers
• Independent Registers and Enables for A and B Buses
• Multiplexed Real-Time and Stored Data
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

• IOL (Max) (mA)
• 64
• IOH (Max) (mA)
• -15
• Technology Family
• BCT
• Rating
• Catalog
• Operating temperature range (C)
• 0 to 70

SN74BCT646的完整型号有：SN74BCT646DW，以下是这些产品的关键参数及官网采购报价：

SN74BCT646DW，工作温度：0 to 70，封装：SOIC (DW)-24，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74BCT646DW的批量USD价格：4.565（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。