The SN74CBT3253C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (r_on), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3253C provides protection for undershoot up to -2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3253C is organized as two 1-of-4 multiplexer/demultiplexers with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. When OE is low, the associated multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated multiplexer/demultiplexer is disabled, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• SN74CBT3253C Functionally Identical to Industry-Standard ’3253 Function
• Undershoot Protection for Off-Isolation on A and B Ports up to -2 V
• Bidirectional Data Flow, With Near-Zero Propagation Delay
• Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (ICC = 3 μA Max)
• VCC Operating Range From 4 V to 5.5 V
• Data I/Os Support 0 to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
• Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22
  • 2000-V Human-Body Model (A114-B, Class II)
  • 1000-V Charged-Device Model (C101)
• Supports I2C Bus Expansion
• Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

• Configuration
• 4:1
• Number of channels (#)
• 2
• Power supply voltage - single (V)
• 5
• Protocols
• Analog
• Ron (Typ) (Ohms)
• 3
• CON (Typ) (pF)
• 22
• Bandwidth (MHz)
• 200
• Operating temperature range (C)
• -40 to 85
• Features
• Undershoot protection
• Input/output continuous current (Max) (mA)
• 128
• Rating
• Catalog

SN74CBT3253C的完整型号有：SN74CBT3253CD、SN74CBT3253CDBQR、SN74CBT3253CDBR、SN74CBT3253CDR、SN74CBT3253CPW、SN74CBT3253CPWR、SN74CBT3253CRGYR，以下是这些产品的关键参数及官网采购报价：

SN74CBT3253CD，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CD的批量USD价格：.378（1000+）

SN74CBT3253CDBQR，工作温度：-40 to 85，封装：SSOP (DBQ)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CDBQR的批量USD价格：.205（1000+）

SN74CBT3253CDBR，工作温度：-40 to 85，封装：SSOP (DB)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CDBR的批量USD价格：.205（1000+）

SN74CBT3253CDR，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CDR的批量USD价格：.178（1000+）

SN74CBT3253CPW，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：90个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CPW的批量USD价格：.378（1000+）

SN74CBT3253CPWR，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CPWR的批量USD价格：.178（1000+）

SN74CBT3253CRGYR，工作温度：-40 to 85，封装：VQFN (RGY)-16，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网SN74CBT3253CRGYR的批量USD价格：.205（1000+）

LEADED-ADAPTER1 — 用于快速测试 TI 5、8、10、16 和 24 引脚引线式封装的表面贴装转 DIP 接头适配器

EVM-LEADED1 板可对 TI 的常见引线式封装进行快速测试和电路板试验。该评估板具有足够的空间，可将 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面贴装封装转换为 100mil DIP 接头。

LEADLESS-ADAPTER1 — 用于测试 TI 6、8、10、12、14、16 和 20 引脚无引线封装的表面贴装转 DIP 接头适配器

EVM-LEADLESS1 板可对 TI 的常见引线式封装进行快速测试和电路板试验。该评估板具有足够的空间，可将 TI 的 DRC、DTP、DQE、RBW、RGY、RSE、RSV、RSW、RTE、RTJ、RUK、RUC、RUG、RUM、RUT 和 YZP 表面贴装封装转换为 100mil DIP 接头。