The ’HC191 devices are 4-bit synchronous, reversible, up/down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters.

The outputs of the four flip-flops are triggered on a low- to high-level transition of the clock (CLK) input if the count-enable (CTEN)\ input is low. A high at CTEN\ inhibits counting. The direction of the count is determined by the level of the down/up (D/U\) input. When D/U\ is low, the counter counts up, and when D/U\ is high, it counts down.

These counters feature a fully independent clock circuit. Change at the control (CTEN\ and D/U\) inputs that modifies the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter is dictated solely by the condition meeting the stable setup and hold times.

These counters are fully programmable; that is, each of the outputs can be preset to either level by placing a low on the load (LOAD)\ input and entering the desired data at the data inputs. The output changes to agree with the data inputs independently of the level of CLK. This feature allows the counters to be used as modulo-N dividers simply by modifying the count length with the preset inputs.

Two outputs are available to perform the cascading function: ripple clock (RCO)\ and maximum/minimum (MAX/MIN) count. MAX/MIN produces a high-level output pulse with a duration approximately equal to one complete cycle of the clock while the count is zero (all outputs low) counting down, or maximum (9 or 15) counting up. RCO\ produces a low-level output pulse under those same conditions, but only while CLK is low. The counters can be cascaded easily by feeding RCO\ to CTEN\ of the succeeding counter if parallel clocking is used, or to CLK if parallel enabling is used. MAX/MIN can be used to accomplish look ahead for high-speed operation.

• Wide Operating Voltage Range of 2 V to 6 V
• Outputs Can Drive Up To 10 LSTTL Loads
• Low Power Consumption, 80-μA Max ICC
• Typical tpd = 13 ns
• ±4-mA Output Drive at 5 V
• Low Input Current of 1 μA Max
• Single Down/Up Count-Control Line
• Look-Ahead Circuitry Enhances Speed of Cascaded Counters
• Fully Synchronous in Count Modes
• Asynchronously Presettable With Load Control

• Function
• Counter
• Bits (#)
• 4
• Technology Family
• HC
• Supply voltage (Min) (V)
• 2
• Supply voltage (Max) (V)
• 6
• Input type
• Standard CMOS
• Output type
• Push-Pull
• Features
• Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

SN74HC191的完整型号有：SN74HC191D、SN74HC191DR、SN74HC191DT、SN74HC191N、SN74HC191NSR，以下是这些产品的关键参数及官网采购报价：

SN74HC191D，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74HC191D的批量USD价格：.245（1000+）

SN74HC191DR，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74HC191DR的批量USD价格：.172（1000+）

SN74HC191DT，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74HC191DT的批量USD价格：.245（1000+）

SN74HC191N，工作温度：-40 to 85，封装：PDIP (N)-16，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74HC191N的批量USD价格：.235（1000+）

SN74HC191NSR，工作温度：-40 to 85，封装：SO (NS)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74HC191NSR的批量USD价格：.224（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。