- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:触发器、锁存器和寄存器 - 计数器
- 功能描述:具有输出寄存器和多路复用三态输出的同步 4 位加/减二进制计数器
- 点击这里打开及下载SN74LS697的技术文档资料
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These low-power Schottky LSI devices incorporate synchronous up/down counters, four-bit D-type registers, and quadruple two-line to one-line multiplexers with three state outputs in a single 20-pin package. The up/down counters are programmable from the data inputs and feature enable P\ and enable T\ and a ripple-carry output for easy expansion. The register/counter select input R/C\, selects the counter when low and the register when high for the three-state outputs, QA, QB, QC, and QD. These outputs are rated at 12 and 24 milliamperes (54LS/74LS) for good bus driving performance.
Both the counter CCK and register clock RCK are positive-edge triggered. The counter clear CCLR\ is active low and is asynchronous on the 'LS696 and 'LS697, synchronous on the 'LS699. Loading of the counter is accomplished when LOAD\ is taken low and a positive transition occurs on the counter clock CCK.
Expansion is easily accomplished by connecting RCO\ of the first stage to ENT\ of the second stage, etc. All ENP\ inputs can be tied common and used as a master enable or disable control.
- 4-Bit Counters/Registers
- Multiplexed Outputs for Counter or Latched Data
- 3-State Outputs Drive Bus Lines Directly
- 'LS696 … Decade Counter, Direct Clear'LS697…Binary Counter, Direct Clear'LS699…Binary Counter, Synchronous Clear
- Function
- Counter
- Bits (#)
- 4
- Technology Family
- LS
- Supply voltage (Min) (V)
- 4.75
- Supply voltage (Max) (V)
- 5.25
- Input type
- Bipolar
- Output type
- 3-State
- Features
- High speed (tpd 10-50ns)
SN74LS697的完整型号有:SN74LS697DW、SN74LS697N,以下是这些产品的关键参数及官网采购报价:
SN74LS697DW,工作温度:0 to 70,封装:SOIC (DW)-20,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LS697DW的批量USD价格:2.609(1000+)
SN74LS697N,工作温度:0 to 70,封装:PDIP (N)-20,包装数量MPQ:20个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:NIPDAU,TI官网SN74LS697N的批量USD价格:3(1000+)
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。