- 制造厂商:TI
- 产品类别:逻辑和电压转换
- 技术类目:缓冲器、驱动器和收发器 - 同相缓冲器和驱动器
- 功能描述:具有 TTL 兼容型 CMOS 输入和三态输出的 4 通道、4.5V 至 5.5V 缓冲器
- 点击这里打开及下载SN74LV125AT的技术文档资料
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The SN74LV125AT is a quadruple bus buffer gate. This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Inputs Are TTL-Voltage Compatible
- 4.5-V to 5.5-V VCC Operation
- Typical tpd of 3.8 ns at 5 V
- Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 5 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot)>2.3 V at VCC = 5 V, TA = 25°C
- Support Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Technology Family
- LV-AT
- Supply voltage (Min) (V)
- 4.5
- Supply voltage (Max) (V)
- 5.5
- Number of channels (#)
- 4
- IOL (Max) (mA)
- 16
- ICC (Max) (uA)
- 20
- IOH (Max) (mA)
- -16
- Input type
- TTL-Compatible CMOS
- Output type
- 3-State
- Features
- Balanced outputs, Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs
- Rating
- Catalog
SN74LV125AT的完整型号有:SN74LV125ATD、SN74LV125ATDBR、SN74LV125ATDR、SN74LV125ATNSR、SN74LV125ATPWR、SN74LV125ATPWT、SN74LV125ATRGYR,以下是这些产品的关键参数及官网采购报价:
SN74LV125ATD,工作温度:-40 to 85,封装:SOIC (D)-14,包装数量MPQ:50个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATD的批量USD价格:.348(1000+)
SN74LV125ATDBR,工作温度:-40 to 85,封装:SSOP (DB)-14,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATDBR的批量USD价格:.163(1000+)
SN74LV125ATDR,工作温度:-40 to 85,封装:SOIC (D)-14,包装数量MPQ:2500个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATDR的批量USD价格:.148(1000+)
SN74LV125ATNSR,工作温度:-40 to 85,封装:SO (NS)-14,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATNSR的批量USD价格:.163(1000+)
SN74LV125ATPWR,工作温度:-40 to 85,封装:TSSOP (PW)-14,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATPWR的批量USD价格:.148(1000+)
SN74LV125ATPWT,工作温度:-40 to 85,封装:TSSOP (PW)-14,包装数量MPQ:250个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATPWT的批量USD价格:.348(1000+)
SN74LV125ATRGYR,工作温度:-40 to 85,封装:VQFN (RGY)-14,包装数量MPQ:3000个,MSL 等级/回流焊峰值温度:Level-2-260C-1 YEAR,引脚镀层/焊球材料:NIPDAU,TI官网SN74LV125ATRGYR的批量USD价格:.155(1000+)
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.