The 'LV138A devices are 3-line to 8-line decoders/demultiplexers designed for 2-V to 5.5-V V_CC operation.

These devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

The conditions at the binary-select inputs (A, B, C) and the three enable inputs (G1, G2A, G2B) select one of eight output lines. The two active-low (G2A, G2B) and one active-high (G1) enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

• 2-V to 5.5-V VCC Operation
• Max tpd of 9.5 ns at 5 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on All Ports
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

• Technology Family
• LV-A
• Number of channels (#)
• 1
• Operating temperature range (C)
• -40 to 85
• Rating
• Catalog
• ICC (Max) (uA)
• 20

SN74LV138A的完整型号有：SN74LV138AD、SN74LV138ADBR、SN74LV138ADGVR、SN74LV138ADR、SN74LV138ANSR、SN74LV138APW、SN74LV138APWR、SN74LV138APWRG4、SN74LV138APWT、SN74LV138ARGYR，以下是这些产品的关键参数及官网采购报价：

SN74LV138AD，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：40个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138AD的批量USD价格：.355（1000+）

SN74LV138ADBR，工作温度：-40 to 85，封装：SSOP (DB)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138ADBR的批量USD价格：.171（1000+）

SN74LV138ADGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138ADGVR的批量USD价格：.155（1000+）

SN74LV138ADR，工作温度：-40 to 85，封装：SOIC (D)-16，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138ADR的批量USD价格：.155（1000+）

SN74LV138ANSR，工作温度：-40 to 85，封装：SO (NS)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138ANSR的批量USD价格：.171（1000+）

SN74LV138APW，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：90个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138APW的批量USD价格：.355（1000+）

SN74LV138APWR，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：SN，TI官网SN74LV138APWR的批量USD价格：.159（1000+）

SN74LV138APWRG4，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138APWRG4的批量USD价格：.178（1000+）

SN74LV138APWT，工作温度：-40 to 85，封装：TSSOP (PW)-16，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138APWT的批量USD价格：.355（1000+）

SN74LV138ARGYR，工作温度：-40 to 85，封装：VQFN (RGY)-16，包装数量MPQ：3000个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV138ARGYR的批量USD价格：.163（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.