- 制造厂商：TI
- 产品类别：逻辑和电压转换
- 技术类目：缓冲器、驱动器和收发器 - 同相缓冲器和驱动器
- 功能描述：具有 TTL 兼容型 CMOS 输入的 10 通道、2V 至 5.5V 缓冲器
- 点击这里打开及下载SN74LV8151的技术文档资料
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The SN74LV8151 is a 10-bit universal Schmitt-trigger buffer with 3-state outputs, designed for 2-V to 5.5-V VCC operation. The logic control (T/C\) pin allows the user to configure Y1 to Y8 as noninverting or inverting outputs. When T/C\ is high, the Y outputs are noninverted (true logic ), and when T/C\ is low, the Y outputs are inverted (complementary logic).
When output-enable (OE)\ input is low, the device passes data from Dn to Yn. When OE\ is high, the Y outputs are in the high-impedance state. The path A to P is a simple Schmitt-trigger buffer, and the path B to N is a simple Schmitt-trigger inverter.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
- 2-V to 5.5-V VCC Operation
- Max tpd of 15 ns at 5 V
- Schmitt-Trigger Inputs Allow for Slow Input Rise/Fall Time
- Polarity Control for Y Outputs Selects True or Complementary Logic
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >>2.3 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Partial-Power-Down Mode Operation
- Supports Mixed-Mode Voltage Operation on All Ports
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Technology Family
- LV-A
- Supply voltage (Min) (V)
- 2
- Supply voltage (Max) (V)
- 5.5
- Number of channels (#)
- 10
- IOL (Max) (mA)
- 12
- ICC (Max) (uA)
- 20
- IOH (Max) (mA)
- -12
- Input type
- Schmitt-Trigger
- Output type
- 3-State
- Features
- Balanced outputs, High speed (tpd 10-50ns), Partial power down (Ioff), Over-voltage tolerant inputs
- Rating
- Catalog
SN74LV8151的完整型号有：SN74LV8151DGVR、SN74LV8151DW、SN74LV8151DWR、SN74LV8151PW、SN74LV8151PWR，以下是这些产品的关键参数及官网采购报价：
SN74LV8151DGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV8151DGVR的批量USD价格：.33（1000+）
SN74LV8151DW，工作温度：-40 to 85，封装：SOIC (DW)-24，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV8151DW的批量USD价格：.396（1000+）
SN74LV8151DWR，工作温度：-40 to 85，封装：SOIC (DW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV8151DWR的批量USD价格：.33（1000+）
SN74LV8151PW，工作温度：-40 to 85，封装：TSSOP (PW)-24，包装数量MPQ：60个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV8151PW的批量USD价格：.396（1000+）
SN74LV8151PWR，工作温度：-40 to 85，封装：TSSOP (PW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LV8151PWR的批量USD价格：.33（1000+）
14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
