SN74LVC373A-EP_TI 具有三态输出的增强型产品八路 D 类透明锁存器

制造厂商：TI
产品类别：逻辑和电压转换
技术类目：触发器、锁存器和寄存器 - D 型锁存器
功能描述：具有三态输出的增强型产品八路 D 类透明锁存器
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SN74LVC373A-EP的产品详情：

The SN74LVC373A octal transparent D-type latch is designed for 2.7-V to 3.6-V V_CC operation.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74LVC373A is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

SN74LVC373A-EP的优势和特性：

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of -55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree(1)
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Operates From 2 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 7.5 ns at 3.3 V
Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
Ioff Supports Partial-Power-Down Mode Operation

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

SN74LVC373A-EP的参数（英文）：

Number of channels (#)
8
Technology Family
LVC
Supply voltage (Min) (V)
2
Supply voltage (Max) (V)
3.6
Input type
Standard CMOS
Output type
3-State
Clock Frequency (Max) (MHz)
100
IOL (Max) (mA)
24
IOH (Max) (mA)
-24
ICC (Max) (uA)
10
Features
Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Partial power down (Ioff)

SN74LVC373A-EP具体的完整产品型号参数及价格（美元）：

SN74LVC373A-EP的完整型号有：SN74LVC373AMDBREP、SN74LVC373AQPWREP、V62/04662-01YE、V62/04662-02ZE，以下是这些产品的关键参数及官网采购报价：

SN74LVC373AMDBREP，工作温度：-55 to 125，封装：SSOP (DB)-20，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVC373AMDBREP的批量USD价格：.859（1000+）

SN74LVC373AQPWREP，工作温度：-40 to 125，封装：TSSOP (PW)-20，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVC373AQPWREP的批量USD价格：.859（1000+）

V62/04662-01YE，工作温度：-40 to 125，封装：TSSOP (PW)-20，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网V62/04662-01YE的批量USD价格：.859（1000+）

V62/04662-02ZE，工作温度：-55 to 125，封装：SSOP (DB)-20，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网V62/04662-02ZE的批量USD价格：.859（1000+）

SN74LVC373A-EP的评估套件：

SN74LVC373A-EP的电路图解：

SN74LVC373A-EP的评估套件：