This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245-EP is optimized to operate with V_CCA and V_CCB set at 1.65 V to 5.5 V. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.

The SN74LVC8T245-EP is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

The SN74LVC8T245-EP is designed so that the control pins (DIR and OE) are supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, all outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
• VCC Isolation Feature – If Either VCC Input Is at GND, All Are in the High-Impedance State
• Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 4000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

• Technology Family
• LVC
• Applications
• GPIO
• Bits (#)
• 8
• High input voltage (Min) (Vih)
• 1.08
• High input voltage (Max) (Vih)
• 5.5
• Vout (Min) (V)
• 1.65
• Vout (Max) (V)
• 5.5
• IOH (Max) (mA)
• -32
• IOL (Max) (mA)
• 32
• Rating
• HiRel Enhanced Product

SN74LVC8T245-EP的完整型号有：CLVC8T245MRHLTEP、SN74LVC8T245MDWREP、SN74LVC8T245MPWREP、V62/09615-01XE、V62/09615-01YE、V62/09615-01ZE，以下是这些产品的关键参数及官网采购报价：

CLVC8T245MRHLTEP，工作温度：-55 to 125，封装：VQFN (RHL)-24，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网CLVC8T245MRHLTEP的批量USD价格：3.357（1000+）

SN74LVC8T245MDWREP，工作温度：-55 to 125，封装：SOIC (DW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVC8T245MDWREP的批量USD价格：3.197（1000+）

SN74LVC8T245MPWREP，工作温度：-55 to 125，封装：TSSOP (PW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVC8T245MPWREP的批量USD价格：3.197（1000+）

V62/09615-01XE，工作温度：-55 to 125，封装：TSSOP (PW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网V62/09615-01XE的批量USD价格：3.197（1000+）

V62/09615-01YE，工作温度：-55 to 125，封装：SOIC (DW)-24，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-3-260C-168 HR，引脚镀层/焊球材料：NIPDAU，TI官网V62/09615-01YE的批量USD价格：3.197（1000+）

V62/09615-01ZE，工作温度：-55 to 125，封装：VQFN (RHL)-24，包装数量MPQ：250个，MSL 等级/回流焊峰值温度：Level-2-260C-1 YEAR，引脚镀层/焊球材料：NIPDAU，TI官网V62/09615-01ZE的批量USD价格：3.357（1000+）

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.