SN74LVCH16646A_TI 具有三态输出的 16 位总线收发器和寄存器

制造厂商：TI
产品类别：逻辑和电压转换
技术类目：缓冲器、驱动器和收发器 - 通用收发器
功能描述：具有三态输出的 16 位总线收发器和寄存器
点击这里打开及下载SN74LVCH16646A的技术文档资料
TI代理渠道，提供当日发货、严格的质量标准，满足您的目标价格

SN74LVCH16646A的产品详情：

This 16-bit bus transceiver and register is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVCH16646A can be used as two 8-bit transceivers or one 16-bit transceiver. The device consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74LVCH16646A.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

SN74LVCH16646A的优势和特性：

Member of the Texas Instruments Widebus? Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 5.7 ns at 3.3 V
Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
Ioff Supports Partial-Power-Down Mode Operation
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

SN74LVCH16646A的参数（英文）：

IOL (Max) (mA)
24
IOH (Max) (mA)
-24
Technology Family
LVC
Rating
Catalog
Operating temperature range (C)
-40 to 85

SN74LVCH16646A具体的完整产品型号参数及价格（美元）：

SN74LVCH16646A的完整型号有：SN74LVCH16646ADGGR、SN74LVCH16646ADL、SN74LVCH16646ADLR，以下是这些产品的关键参数及官网采购报价：

SN74LVCH16646ADGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVCH16646ADGGR的批量USD价格：.869（1000+）

SN74LVCH16646ADL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVCH16646ADL的批量USD价格：1.13（1000+）

SN74LVCH16646ADLR，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVCH16646ADLR的批量USD价格：.956（1000+）

SN74LVCH16646A的评估套件：

SN74LVCH16646A的电路图解：

SN74LVCH16646A的评估套件：