This bus buffer is designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE)\ input is high.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
• Supports Unregulated Battery Operation Down to 2.7 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Ioff Supports Partial-Power-Down Mode Operation
• Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

• Technology Family
• LVT
• Supply voltage (Min) (V)
• 2.7
• Supply voltage (Max) (V)
• 3.6
• Number of channels (#)
• 4
• IOL (Max) (mA)
• 64
• ICC (Max) (uA)
• 7000
• IOH (Max) (mA)
• -32
• Input type
• TTL-Compatible CMOS
• Output type
• 3-State
• Features
• Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs, Bus-hold
• Rating
• Catalog

SN74LVT125的完整型号有：SN74LVT125D、SN74LVT125DBR、SN74LVT125DR、SN74LVT125NSR、SN74LVT125PW、SN74LVT125PWR，以下是这些产品的关键参数及官网采购报价：

SN74LVT125D，工作温度：-40 to 85，封装：SOIC (D)-14，包装数量MPQ：50个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125D的批量USD价格：.354（1000+）

SN74LVT125DBR，工作温度：-40 to 85，封装：SSOP (DB)-14，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125DBR的批量USD价格：.288（1000+）

SN74LVT125DR，工作温度：-40 to 85，封装：SOIC (D)-14，包装数量MPQ：2500个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125DR的批量USD价格：.261（1000+）

SN74LVT125NSR，工作温度：-40 to 85，封装：SO (NS)-14，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125NSR的批量USD价格：.328（1000+）

SN74LVT125PW，工作温度：-40 to 85，封装：TSSOP (PW)-14，包装数量MPQ：90个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125PW的批量USD价格：.354（1000+）

SN74LVT125PWR，工作温度：-40 to 85，封装：TSSOP (PW)-14，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVT125PWR的批量USD价格：.262（1000+）

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.