SN74LVTH16373_TI 具有三态输出的 3.3V ABT 16 位透明 D 类锁存器

制造厂商：TI
产品类别：逻辑和电压转换
技术类目：触发器、锁存器和寄存器 - D 型锁存器
功能描述：具有三态输出的 3.3V ABT 16 位透明 D 类锁存器
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SN74LVTH16373的产品详情：

The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

SN74LVTH16373的优势和特性：

Members of the Texas Instruments Widebus? Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation Down to 2.7 V
Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up 3-State Support Hot Insertion
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Distributed VCC and GND Pins Minimize High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 500 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

SN74LVTH16373的参数（英文）：

Number of channels (#)
16
Technology Family
LVT
Supply voltage (Min) (V)
2.7
Supply voltage (Max) (V)
3.6
Input type
TTL-Compatible CMOS
Output type
3-State
Clock Frequency (Max) (MHz)
160
IOL (Max) (mA)
64
IOH (Max) (mA)
-32
ICC (Max) (uA)
5000
Features
Ultra high speed (tpd <5ns), Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Bus-hold, Flow-through pinout

SN74LVTH16373具体的完整产品型号参数及价格（美元）：

SN74LVTH16373的完整型号有：SN74LVTH16373DGGR、SN74LVTH16373DL、SN74LVTH16373DLR，以下是这些产品的关键参数及官网采购报价：

SN74LVTH16373DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-48，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVTH16373DGGR的批量USD价格：.652（1000+）

SN74LVTH16373DL，工作温度：-40 to 85，封装：SSOP (DL)-48，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVTH16373DL的批量USD价格：.88（1000+）

SN74LVTH16373DLR，工作温度：-40 to 85，封装：SSOP (DL)-48，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74LVTH16373DLR的批量USD价格：.75（1000+）

SN74LVTH16373的评估套件：

SN74LVTH16373的电路图解：

SN74LVTH16373的评估套件：