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SN74LVTH543-EP的基本参数
  • 制造厂商:TI
  • 产品类别:逻辑和电压转换
  • 技术类目:缓冲器、驱动器和收发器 - 通用收发器
  • 功能描述:具有三态输出的增强型产品 3.3V Abt 八路寄存收发器
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SN74LVTH543-EP的产品详情:

This octal transceiver is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVTH543 contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register, to permit independent control in either direction of data flow.

The A-to-B enable (CEAB)\ input must be low to enter data from A or to output data from B. If CEAB is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA\, LEBA\, and OEBA\ inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

SN74LVTH543-EP的优势和特性:
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Supports Unregulated Battery Operation Down to 2.7 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

SN74LVTH543-EP的参数(英文):
  • IOL (Max) (mA)
  • 64
  • IOH (Max) (mA)
  • -64
  • Technology Family
  • LVT
  • Rating
  • HiRel Enhanced Product
  • Operating temperature range (C)
  • -40 to 85
SN74LVTH543-EP具体的完整产品型号参数及价格(美元):

SN74LVTH543-EP的完整型号有:SN74LVTH543IPWREP、V62/04677-01XE,以下是这些产品的关键参数及官网采购报价:

SN74LVTH543IPWREP,工作温度:-40 to 85,封装:TSSOP (PW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LVTH543IPWREP的批量USD价格:1.819(1000+)

V62/04677-01XE,工作温度:-40 to 85,封装:TSSOP (PW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网V62/04677-01XE的批量USD价格:1.819(1000+)

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SN74LVTH543-EP的评估套件:

SN74LVTH543IPWREP,工作温度:-40 to 85,封装:TSSOP (PW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LVTH543IPWREP的批量USD价格:1.819(1000+)

V62/04677-01XE,工作温度:-40 to 85,封装:TSSOP (PW)-24,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网V62/04677-01XE的批量USD价格:1.819(1000+)

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