The C6654 and C6652 are high performance fixed- and floating-point DSPs that are based on TI’s KeyStone multicore architecture. Incorporating the new and innovative C66x DSP core, this device can run at a core speed of up to 850 MHz for C6654 and 600 MHz for C6652. For developers of a broad range of applications, both C6654 and C6652 DSPs enable a platform that is power-efficient and easy to use. In addition, the C6654 and C6652 DSPs are fully backward compatible with all existing C6000™ family of fixed- and floating-point DSPs.

TI’s KeyStone architecture provides a programmable platform integrating various subsystems (C66x cores, memory subsystem, peripherals, and accelerators) and uses several innovative components and techniques to maximize intradevice and interdevice communication that lets the various DSP resources operate efficiently and seamlessly. Central to this architecture are key components such as Multicore Navigator that allows for efficient data management between the various device components. The TeraNet is a nonblocking switch fabric enabling fast and contention-free internal data movement. The multicore shared memory controller allows access to shared and external memory directly without drawing from switch fabric capacity.

For fixed-point use, the C66x core has 4× the multiply accumulate (MAC) capability of C64x+ cores. In addition, the C66x core integrates floating-point capability and the per-core raw computational performance is an industry-leading 27.2 GMACS per core and 13.6 GFLOPS per core (@850 MHz frequency). The C66x core can execute 8 single precision floating-point MAC operations per cycle and can perform double- and mixed-precision operations and is IEEE 754 compliant. The C66x core incorporates 90 new instructions (compared to the C64x+ core) targeted for floating-point and vector math oriented processing. These enhancements yield sizeable performance improvements in popular DSP kernels used in signal processing, mathematical, and image acquisition functions. The C66x core is backward code-compatible with TI’s previous generation C6000 fixed- and floating-point DSP cores, ensuring software portability and shortened software development cycles for applications migrating to faster hardware.

The C6654 and C6652 DSPs integrate a large amount of on-chip memory. In addition to 32KB of L1 program and data cache, 1024KB of dedicated memory can be configured as mapped RAM or cache. All L2 memories incorporate error detection and error correction. For fast access to external memory, this device includes a 32-bit DDR-3 external memory interface (EMIF) running at a rate of 1066 MHz and has ECC DRAM support.

This family supports a number of high-speed standard interfaces including PCI Express Gen2 and Gigabit Ethernet (PCIe and Gigabit Ethernet are not supported on the C6652). This family of DSPs also includes I²C, UART, Multichannel Buffered Serial Port (McBSP), Universal Parallel Port (uPP), and a 16-bit asynchronous EMIF, along with general-purpose CMOS IO.

The C6654 and C6652 devices have a complete set of development tools, which includes: an enhanced C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.

TI’s KeyStone Multicore Architecture provides a high performance structure for integrating RISC and DSP cores with application-specific coprocessors and I/O. The KeyStone architecture is the first of its kind that provides adequate internal bandwidth for nonblocking access to all processing cores, peripherals, coprocessors, and I/O. This internal bandwidth is achieved with four main hardware elements: Multicore Navigator, TeraNet, and Multicore Shared Memory Controller.

Multicore Navigator is an innovative packet-based manager that controls 8192 queues. When tasks are allocated to the queues, Multicore Navigator provides hardware-accelerated dispatch that directs tasks to the appropriate available hardware. The packet-based system on a chip (SoC) uses the two Tbps capacity of the TeraNet switched central resource to move packets. The Multicore Shared Memory Controller lets processing cores access shared memory directly without drawing from the capacity of TeraNet, so packet movement cannot be blocked by memory access.

• One TMS320C66x DSP Core Subsystem (CorePac)
  • C66x Fixed- and Floating-Point CPU Core: Up to 850 MHz for C6654 and 600 MHz for C6652
• Multicore Shared Memory Controller (MSMC)
  • Memory Protection Unit for DDR3_EMIF
• Multicore Navigator
  • 8192 Multipurpose Hardware Queues with Queue Manager
  • Packet-Based DMA for Zero-Overhead Transfers
• Peripherals
  • PCIe Gen2 (C6654 Only)
    • Single Port Supporting 1 or 2 Lanes
    • Supports up to 5 GBaud Per Lane
  • Gigabit Ethernet (GbE) Subsystem (C6654 Only)
    • One SGMII Port (C6654 Only)
    • Supports 10-, 100-, and 1000-Mbps Operation
  • 32-Bit DDR3 Interface
    • DDR3-1066
    • 4GB of Addressable Memory Space
  • 16-Bit EMIF
  • Universal Parallel Port
    • Two Channels of 8 Bits or 16 Bits Each
    • Supports SDR and DDR Transfers
  • Two UART Interfaces
  • Two Multichannel Buffered Serial Ports (McBSPs)
  • I2C Interface
  • 32 GPIO Pins
  • SPI Interface
  • Semaphore Module
  • Eight 64-Bit Timers
  • Two On-Chip PLLs
• Commercial Temperature:
  • 0°C to 85°C
• Extended Temperature:
  • –40°C to 100°C

• DSP
• 1 C66x
• DSP MHz (Max)
• 600
• CPU
• 32-/64-bit
• Operating system
• TI-RTOS
• Ethernet MAC
• 10/100/1000
• PCIe
• 2 PCIe Gen2
• Rating
• Catalog
• Operating temperature range (C)
• -40 to 100, 0 to 85

TMS320C6652的完整型号有：TMS320C6652CZH6、TMS320C6652CZHA6，以下是这些产品的关键参数及官网采购报价：

TMS320C6652CZH6，工作温度：0 to 85，封装： (CZH)-625，包装数量MPQ：60个，MSL 等级/回流焊峰值温度：Level-3-245C-168 HR，引脚镀层/焊球材料：Call TI，TI官网TMS320C6652CZH6的批量USD价格：22.33（1000+）

TMS320C6652CZHA6，工作温度：-40 to 100，封装： (CZH)-625，包装数量MPQ：60个，MSL 等级/回流焊峰值温度：Level-3-245C-168 HR，引脚镀层/焊球材料：Call TI，TI官网TMS320C6652CZHA6的批量USD价格：27.913（1000+）

TMDSEVM6657 — TMS320C6657 Lite 评估模块

TMS320C6657LS Lite 评估模块 (EVM) 是易于使用且符合成本效益的开发工具，可帮助开发人员使用 C6657、C6655 或 C6654 系列 DSP 快速着手进行设计。EVM 包括具有强大连接选项的单个板载 C6657 处理器，使客户可以在各种系统中使用此 AMC 封装卡。它还可用作独立电路板。随附 6657LS EVM 的软件包括 Code Composer Studio™ 集成开发环境版本 5 (CCS v5)、包含板级支持包 (BSP) 的 TI 多核软件开发套件 (MCSDK)、芯片支持库 (CSL)、加电自检测 (POST)、网络开发套件 (...)

SHELD-3P-DSP-SOMS — Sheldon DSP-FPGA 电路板

Sheldon Instruments 为 PCIe/PCI、PCI104e/PCI104、XMC/PMC 和 CompactPCI 系统设计和制造基于 DSP 的 COTS 数据采集和控制硬件，以及适用于各种应用和市场的驱动程序和实时开发软件。

如需了解有关 Sheldon 仪器的更多信息，请访问 https://sheldoninstruments.com。




发件人： Sheldon Instruments, Inc.

PROCESSOR-SDK-RTOS-C665X — 适用于 C665X 的 RTOS 处理器 SDK

经过 25 年以上的组装和 C 代码开发，VOCAL 的模块化软件套件可用于各种各样的 TI DSP 产品。产品具体包括 ATA、VoIP 服务器和网关、基于 HPNA 的 IPBX、视频监控、语音和视频会议、语音和数据射频器件、RoIP 网关、政务安全器件、合法拦截软件、医疗设备、嵌入式调制解调器、T.38 传真和 FoIP。

如需了解有关 Vocal Technologies 的更多信息，请访问 https://www.vocal.com。 发件人： VOCAL Technologies, Ltd.

C6652 Power Consumption Model

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)